The 2024 P4 Workshop took place October 3rd, and was hosted and sponsored by Google. This in-person event took place at Google’s Moffett Park Campus in Sunnyvale, California and offered an opportunity for the P4 ecosystem to share knowledge and experiences with the broader community and to facilitate collaboration.
View videos and slides on-demand from the event below!
Invited Talks
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Welcome, State of P4 & 2024 Distinguished Contributor Award
Andy Fingerhut, Principal Engineer, Intel |
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Keynote – Navigating Internet Research with P4: Solutions for Performance and SecurityMaria Apostolaki, Assistant Professor of Electrical and Computer Engineering, Princeton University |
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Fireside Chat with Martin CasadoMartin Casado, General Partner, Andreessen Horowitz |
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P4 on Hardware: The FutureKonstantin Weitz, Staff Software Engineer, Google (Moderator) |
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In-Depth Talks
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Past, Present and Future of P4Deb Chatterjee, Sr Director Software Engineering, Intel |
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Compiler-assisted Kernel-based P4 Pipeline Offloading Using Intel IPUDeb Chatterjee, Sr Director Software Engineering, Intel |
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Towards the Performant P4CAnton Korobeynikov, Principal Software Engineer, Compiler Development, Access Softek Toolchains |
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Supporting PTP-1588 in BMv2: A Proposed Ingress and Egress Timestamping SchemeBill Pontikakis, Sr Research Associate, Polytechnique Montréal |
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SONiC DASH on Intel IPU2100Shweta Shrivastava, Cloud Software Engineer, Intel |
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Internals of the Intel Tofino CompilerGlen Gibb, Compiler Engineer, Intel |
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P4-SpecTec – Mechanized Language Definition for P4Jaehyun Lee, Student, KAIST |
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Centralized Telemetry and Security Enforcement Using SONiC and P4Shekher Bulusu, Sr Manager Software Engineering, GEICO |
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Modeling Hardware Blocks of Network ASICs using P4Jean Tourrilhes, Researcher, HPE |
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In-Memory Key-Value Store Live Migration with NetMigrateZeying Zhu, PhD Student, University of Maryland |
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P4-Based Automated Reasoning (P4-BAR) for the (Networking) Masses!Steffen Smolka, Staff Software Engineer, Google |
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Scaling P4-Based Automated Reasoning (Performance and Coverage)Ali Kheradmand, Senior Software Engineer, Google |
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P4HIR: Toward Bridging P4C with MLIRBili Dong, Software Engineer, Google |
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Demos
| Title | Abstract | |
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SONiC DASH on Intel IPU2100Namrata Limaye, Director Software Engineering, Intel |
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Data Center Routing GEICO SDN Controller and GEICO SONiC Using P4Sunil Kumar Rawookar, Staff Engineer, GEICO Tech |
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Offload NAT and Routing onto Intel IPU Using P4-TCNeha Singh, Staff Software Engineer, Intel |
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P4 IDE: An Integrated Development Environment for P4-based Data Plane DevelopmentNamrata Limaye, Director Software Engineer, Intel |
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P4Docker: Simplifying P4 Switch Testbeds with Docker Integration
Lucas Trombeta, PhD Candidate, Federal University of ABC (UFABC) |
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Supporting PTP-1588 in BMv2: A Proposed Ingress and Egress Timestamping SchemeBill Pontikakis, Sr Research Associate, Polytechnique Montréal |
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Poster
| Title | Abstract | |
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Babel: The Tower So FarVictor Rios, Software Engineer, Google |
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General Chair – Nate Foster
Program Co-Chairs – Andy Fingerhut, Muhammad Shahbaz
Program Committee
– Jehandad Khan, AMD
– Ori Rottenstreich, Technion
– Vishal Shrivastav, Purdue University
– Gianni Antichi, Politecnico di Milano and Queen Mary University of London
– Ben Pfaff, Feldera
– Ajay Lotan Thakur, Intel Corp
– Victor Liu, University of Michigan
– Vladimir Gurevich, P4ica
– Tushar Swamy, unaffiliated
– Yiming Qiu, University of Michigan
– Amedeo Sapio, Amazon Web Services
– Lavanya Jose, Google