P4 Developer Days – A Multi-Site Testbed for Heterogeneous P4 Data Plane Experimentation on Research Cyberinfrastructure

Abstract

This presentation introduces a multi-site testbed that unifies three distinct classes of P4-programmable hardware, FPGA SmartNICs (AMD Alveo), DPUs (NVIDIA BlueField), and software switches (BMv2), under a single Kubernetes control plane on the National Research Platform (NRP). We detail the architecture that uses ESnet’s SENSE orchestrator for dynamic multi-domain Layer 2 path provisioning and a unified shell automation framework for reproducible experiments. We also share critical lessons learned from integrating heterogeneous targets and running a real-world deployment. This work provides a blueprint for building and operating advanced, reproducible P4 experimentation infrastructure for the research community.

Speaker

Mohammad Firas Sada is a researcher at SDSC specializing in deep learning, high-performance computing (HPC), and advanced networking. His work within the Nautilus Kubernetes cluster at the National Research Platform focuses on distributed AI workflows, network programmability, hardware acceleration with novel compute architectures, and scalable cyberinfrastructure for data-intensive science. His interests include optimizing AI training across GPU clusters, accelerating scientific computing with programmable networks, and developing tools for large-scale data movement and workflow automation. He enjoys working with talented teams to foster collaboration, exchange ideas, and advance research in computing.