P4 Workshop 2019

A Presentation by the P4 Language Consortium

Held at Stanford University on Wednesday, May 1, 2019

Special Thanks to our Sponsors:



    Address: Arrillaga Alumni Center, 326 Galvez St, Stanford, CA 94305

    Directions below:


  • 8:00 – 9:00am
    • Registration and Breakfast

SESSION CHAIR: Calin Cascaval (Barefoot Networks)

  • 9:20 – 9:40am

  • 9:40 – 10:00am

  • 10:00 – 10:20am
    • Pegasus: Load-Aware Selective Replication with an In-Network Coherence Directory (Abstract) (Slides) (Video)Speaker: Jialin Li (University of Washington)Co-authors: Authors: Jialin Li (University of Washington); Jacob Nelson (Microsoft Research); Xin Jin (Johns Hopkins University); Dan R. K. Ports (Microsoft Research)

  • 10:20 – 10:35am
    • Demo Lightning Talks (1-2 min per demo, ~5 demos) (Video)

  • 10:35 – 11:05am
    • Break and Demo Visits

SESSION CHAIR: Mihai Budiu (VMware Research)

  • 11:05 – 11:25am
    • Event-Driven Packet Processing (Abstract) (Slides) (Video)Speaker: Stephen Ibanez (Stanford University)Co-authors: Stephen Ibanez (Stanford University); Gordon Brebner (Xilinx Labs); Gianni Antichi (Queen Mary University of London); Nick McKeown (Stanford University)

  • 11:25 – 11:45am
    • Enabling Memory-intensive Network Functions on Programmable Switches (Abstract) (Slides) (Video)Speaker: Daehyeok Kim (Carnegie Mellon University)Co-authors: Daehyeok Kim, Zaoxing Liu (Carnegie Mellon University); Yibo Zhu (Bytedance); Changhoon Kim, Jeongkeun Lee, Antonin Bas (Barefoot Networks); Vyas Sekar, Srini Seshan (Carnegie Mellon University)

  • 11:45 – 12:05pm
    • SwitchML: Scaling Distributed Machine Learning with In-Network Aggregation (Slides) (Video)Speaker: Jacob Nelson (Microsoft Research)Co-authors: Amedeo Sapio, Marco Canini, Chen-Yu Ho (KAUST); Jacob Nelson (Microsoft Research); Panos Kalnis (KAUST); Changhoon Kim (Barefoot Networks); Arvind Krishnamurthy (University of Washington); Masoud Moshref (Barefoot Networks); Dan R. K. Ports (Microsoft Research); Peter Richtàrik (KAUST)

  • 12:05 – 12:25pm
    • Taurus: An Intelligent Data Plane (Abstract) (Slides) (Video)Speaker: Tushar Swamy (Stanford University)Co-authors: Tushar Swamy, Alexander Rucker, Muhammad Shahbaz, Neeraja Yadwadkar, Yaqi Zhang, Kunle Olukotun (Stanford University)

  • 12:25 – 12:40pm
    • Demo Lightning Talks (1-2 min per demo, ~5 demos) (Video)

  • 12:40 – 2:05pm
    • Lunch and Demo Visits

SESSION CHAIR: Nick McKeown (Stanford University)

  • 2:05 – 3:20pm
    • KEYNOTE: The End of Moore’s Law and Faster General Purpose Processors, and a New Road Forward (Slides) (Video)Speaker and Author: John Hennessy (Stanford University)Abstract: After 40 years of remarkable progress in general-purpose processors, a variety of factors are combining to lead to a much slower rate of performance growth in the future. These limitations arise from three different areas: IC technology, architectural inefficiencies, and changing applications and usage. The end of Dennard scaling and the slowdown in Moore’s Law will require much more efficient architectural approaches than we have relied on. Although progress on general-purpose processors may hit an asymptote, domain specific architectures may be the one attractive path for important classes of problems, at least until we invent a flexible and competitive replacement for silicon.

  • 3:20 – 3:50pm
    • Break and Demo Visits

SESSION CHAIR: Gordon Brebner (Xilinx)

  • 3:50 – 4:10pm
    • Using Programmable Chip and Open Source Software to disaggregate Network Packet Broker (NPB) and 5G UPF (Abstract) (Slides) (Video)Speaker: Chris Sueng-Y. Park (KulCloud)Co-authors: Junho Suh (SK Telecom); SuengYong Park (KulCloud)

  • 4:10 – 4:40pm
    • Trustworthy Data Plane Programming (Video)Speaker and Author: Nate Foster (Cornell University)

  • 4:40 – 5:00pm

  • 5:00 – 5:15pm
    • Closing Remarks (Video)

  • 5:15 – 6:30pm
    • Reception

Demos to Visit

  • SRv6 Mobile User Plane, POC and Open Source Implementation (Toyota Motor Corporation, SoftBank, APRESIA Systems, Ltd.) (abstract)
  • daPIPE:DAta Plane Incremental Programming Environment (Cisco Systems, Politecnico di Torino) (abstract)
  • Improving Gossip Protocols with P4 (Cornell University)
  • Sampling on Demand using P4 Programmable Switch in Hybrid Mode (Technion University, Mellanox Technologies)
  • Fast String Searching on PISA (Università della Svizzera italiana, Barefoot Networks) (abstract)
  • Optimizing Memory Resource Allocation of P4 Match Action Tables (CESNET, Netcope Technologies)
  • T4P4S & PIE: Towards an AQM Evaluation Testbed with P4 and DPDK (Eötvös Loránd University) (abstract)
  • gRPC, P4 Runtime and Zero-Touch-Provisioning Deployment in Programmable Forwarding Planes (Noviflow)
  • P4 Insight: P4 visualization (Barefoot Networks)
  • P4-16 IPv6 Implementation of Cisco ACI Data Plane (MNK Consulting) (abstract)
  • Implementing the P4 Portable Switch Architecture (PSA) (Cornell University)
  • Event-Driven Packet Processing using P4->NetFPGA (Stanford University, Xilinx Labs) (abstract)

Technical Program Committee

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