P4 2022 Workshop

The P4 2022 Workshop incorporates insights and perspectives from P4 community members around the world and encompass topics related to:

P4 language
P4 compile targets
P4 tool chain
P4 use cases & apps
Control plane or network OS for P4 targets

Check out all the talks from this exciting and informative event on-demand!

Keynotes

	TITLE	VIDEO	SLIDES
	Welcome to P4 Workshop 2022! JK Lee, Program Chair, member of P4 TST, Senior Principal Engineering, Intel
	P4 on the Move! Andy Fingerhut, Principal Engineer, Intel
	Programmable Network Devices: One Vendor’s Perspective Kenneth Duda, Founder, CTO & SVP Software Engineering, Arista Networks
	Panel – IPU/DPU Brad Burres, Fellow, Intel Matty Kadosh, Principle Architect, Nvidia Krishna Doddapaneni, Co-founder, VP Software Engineering, Pensando Gordon Brebner, Senior Fellow, AMD
	Scaling SDN Policy Distribution Ben Pfaff, Principal Researcher, VMware
	Expanding the P4 Universe Gordon Brebner, Senior Fellow, AMD
	Programmable Networking for a Distributed Edge Nick McKeown, SVP & GM and Senior Fellow, Network & Edge Group, Intel Sachin Katti, CTO, Network & Edge Group, Intel
	The Journey Towards Predictable Network in Alibaba Cloud Dennis Cai, Head of Network Infrastructure, Alibaba
	SONiC, Programmability & Acceleration Xin Liu, Principal Product Manager, Microsoft

Language

	TITLE	VIDEO	SLIDES
	Extend P4 to Support Runtime Programmability – In Depth Talk Yong Feng, Ph.D Student, Tsinghua University Dr. Haoyu Song, Researcher, Futurwei Technologies
	Applets, a Portability and Composability Solution for P4 – In Depth Talk Venkat Pullela, Chief of Technology, Networking, Keysight Surendra Anubolu, Distinguished Engineer, Broadcom
	Primitives for Finite Field Arithmetic in Network Switches – In Depth Talk Daniel Seara, MSc Student, IST, Universit of Lisbon Bernardo Conde, Master Student, IST, Universit of Lisbon
	NERPA: Network Programming with Relational and Procedural Abstractions – In Depth Talk Debnil Sur, Senior Software Engineer, VMware
	SuperP4: Preprocessor-Aware Syntax and Semantic Analysis for P4 Programs – Tech Brief Kaarthik Alagappan, Graduate Research Assistant, University of Central Florida
	P4RROT: Generating P4 Code for the Application Layer – Tech Brief Csaba Györgyi, PhD Student, ELTE Eötvös Loránd University Sandor Laki, Assitant Professor, ELTE Eötvös Loránd University

Target

	TITLE	VIDEO	SLIDES
	Connection Tracking Using P4 – In Depth Talk Anjali Singhai Jain, Principle Engineer, Intel Nishanth Bhat, Intel Namrata Limaye, Intel
	Speeding Up Network FPGA Design Using P4 – In Depth Talk Bert Klaps, Senior Systems Engineer, Intel Miroslaw Walukiewicz, Intel
	Line Rate IPsec on a PNA-Compliant Packet Processing Pipeline – In Depth Talk Sameer Kittur, Distinguished Engineer, Pensando Systems
	P4 Over Linux TC – In Depth Talk Jamal Hadi Salim, CEO, Mojatatu Networks
	Develop Your CPU Network Stack in P4 – In Depth Talk Cristian Dumitrescu, Software Architect for Packet Processing, Intel
	P4 at the Interface Between NIC and Host – In Depth Talk Raghava Sivaramu, Fellow, Pensando Systems
	P4 in Open vSwitch with OfP4 – Tech Brief Ben Pfaff, Researcher, VMware
	Deep Dive & Getting Started with PSA Implementation for eBPF – Tutorial Tomasz Osiński, Cloud Software Development Engineer, Intel Mateusz Kossakowski, R&D Expert, Orange Labs Poland Jan Palimaka, Chief R&D Specialist, Orange Labs Poland
	PSA-eBPF: Portable Switch Architecture for eBPF – Tech Brief Tomasz Osiński, Cloud Software Development Engineer, Intel Mateusz Kossakowski, R&D Expert, Orange Labs Poland Jan Palimaka, Chief R&D Specialist, Orange Labs Poland

Tool Chain

	TITLE	VIDEO	SLIDES
	p4testgen: Automated Test Generation for Real-World P4 Data Planes – In Depth Talk Fabian Ruffy, Intern, Intel and PhD Student, NYU
	Dynamic P4 Pipeline Configuration – In Depth Talk Anjali Singhai Jain, Principle Engineer, Intel Hari Thantry, Cloud Architect, Google
	Differential Testing of P4 Implementations Using CI/CD – Tech Brief Parisa Ataei, Postdoc Scholar, Cornell University
	P4 Designer – Demo Pratap Pellakuru, Development Tools Software Architect, Intel Sharmila S., Cloud Software Development Engineer, Intel
	Introducing IPDK – Tutorial Deb Chatterjee, Senior Director of Engineering, Intel

Control Plane and NOS

	TITLE	VIDEO	SLIDES
	Evolving P4 Runtime From Switch to DPU – In Depth Talk Milind Chabbi, Nvidia Alan Lo, Compiler/Cloud Architect, Nvidia
	Accelerating 5G (Mobile Core) Control Plane Using P4 – In Depth Talk Jingqi Huang, Ph.D Student, Purdue University Jiayi Meng, PhD Candidate, Purdue University
	Table Driven Interface (TDI): Usages and Advantages – In Depth Talk Sayan Bandyopadhyay, Cloud Software Developer, Intel James Choi, Cloud Software Architect, Intel
	PINS Update and Roadmap – In Depth Talk Bhagat Janarthanan, Software Engineering Lead, Google Brian O’Connor, Intel Vamsi Punati, Google Reshma Sudarshan, Director of Applications Engineering, Intel
	PINS Packet I/O – In Depth Talk Srikishen Pondicherry, Software Engineer, Google Brian O’Connor, Intel Don Newton, Intel
	P4-OVS Split Architecture – In Depth Talk Namrata Limaye, Engineering Manager/Tech Lead, Intel Brian O’Connor, Intel Ajay Kumar Dubey, Intel
	P4 as a Single Source of Truth for SONiC DASH Use Cases on Both Softswitch and Hardware – In Depth Talk Reshma Sudarshan, Director of Applications Engineering, Intel Chris Sommers, Sr. Software Architect, Keysight
	PINS Getting Started – Tutorial Judy Snow, ONF Brian O’Connor, Intel

Application

	TITLE	VIDEO	SLIDES
	P4 FOR NIC – A CLOUD PROVIDER PERSPECTIVE – In Depth Talk Hari Thantry, Cloud Architect, Google
	Inband Network Telemetry (INT): History, Impact and Future Directions – In Depth Talk JK Lee, Sr. Principal Engineer, Intel Mukesh Hira, Principal Engineer, Networking and Security, VMware
	Network Programmability “Squared” – In Depth Talk Satoru Matsushima, Technical Meister, Softbank
	Architecture for Multi-Terabit Programmable Networking Functions – In Depth Talk Petr Kastovsky, Product Marketing, Intel Georgios Nikolaidis, Software Architect, Intel
	A Change Detection Primitive for the Network Data Plane – In Depth Talk Gonçalo Matos, Researcher, INESC-ID
	M-PolKA: Enabling and Exploiting Multipath Stateless Source Routing for Programmable Data Planes – In Depth Talk Rafael S. Guimaraes, Associate Professor, Instituto do Espirito Santo
	PMNet: In-Network Data Persistence – In Depth Talk Korakit Seemakhupt, Graduate Student, University of Virginia
	Service Mesh P4 Data Plane – In Depth Talk Anjali Singhai Jain, Principle Engineer, Intel Mrittika Ganguli, Intel Valas Valancius, Google Nupur Jain, Intel
	Towards In-Network Anomaly Detection – In Depth Talk João Romeiras Amado, PhD Student, INESC-ID, University of Lisbon
	Demo of L2 Forwarding + Vxlan with Control Packet Flow Using P4-OVS – Demo Nupur Uttarwar, Cloud Software Engineer, Intel Sandeep Nagapattinam, Cloud Software Engineer, Intel
	P7 (P4 Programmable Patch Panel): An Instant 100G Emulated Network Testbed in a Pizza Box – Demo Fabricio Rodriguez, PhD Student, UNICAMP
	Enabling WCMP in SONiC Using PINS and ONOS – Demo Nillofar Toorchi, MTS, ONF Daniele Moro, Cloud Software Development Engineer, Intel
	TCP-INT: Lightweight INT in TCP Transport – Demo Simon Wass, Cloud Software Engineer, Intel Miao Mao, Staff Software Engineer, Baidu
	Open SRv6 Project: Open Source for P4-based Edge Router – Demo Weiqiang Cheng, Principle Architect of IP Network, China Mobile Jiang Liu, Professor, Beijing University of Posts and Telecommunications
	Path Tracing: Revealing the Unknowns about ECMP – Demo Ahmed Abdelsalam, Software Engineer, Cisco Systems
	SD-Fabric (Part 1) – Tutorial Carmelo Cascone, Cloud Software Development Engineer, Intel Charles Chan, Cloud Software Development Engineer, Intel
	SD-Fabric (Part 2) – Tutorial Carmelo Cascone, Cloud Software Development Engineer, Intel Charles Chan, Cloud Software Development Engineer, Intel
	SD-Fabric (Part 3) – Tutorial Carmelo Cascone, Cloud Software Development Engineer, Intel Charles Chan, Cloud Software Development Engineer, Intel

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