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X-WR-CALDESC:Events for P4 - Language Consortium
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DTSTART:20230101T000000
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BEGIN:VEVENT
DTSTART;TZID=UTC:20241003T080000
DTEND;TZID=UTC:20241003T080000
DTSTAMP:20251001T192054Z
CREATED:20250912T220242Z
LAST-MODIFIED:20251001T192054Z
UID:10000122-1727942400-1727942400@p4.org
SUMMARY:2024 P4 Workshop
DESCRIPTION:The 2024 P4 Workshop took place October 3rd\, and was hosted and sponsored by Google. This in-person event took place at Google’s Moffett Park Campus in Sunnyvale\, California and offered an opportunity for the P4 ecosystem to share knowledge and experiences with the broader community and to facilitate collaboration. \nView individual videos and slides on-demand from the event below! Or\, view YouTube Playlist. \nInvited Talks\n\n\n  \n\n\n\n\n \nTitle\nVideo\nSlides\n\n\n\n\n\nWelcome\, State of P4 & 2024 Distinguished Contributor Award \nAndy Fingerhut\, Principal Engineer\, Intel\n\n\n\n\n\n\nKeynote – Navigating Internet Research with P4: Solutions for Performance and Security\nMaria Apostolaki\, Assistant Professor of Electrical and Computer Engineering\, Princeton University\n\n\n\n\n\n\nFireside Chat with Martin Casado\nMartin Casado\, General Partner\, Andreessen Horowitz\nNate Foster\, Professor Computer Science\, Cornell University\n\n\n\n\n\n\nP4 on Hardware: The Future\nKonstantin Weitz\, Staff Software Engineer\, Google (Moderator)\nVipin Jain\, Sr Fellow Engineer\, AMD\nAnjali Singhai Jain\, Network Architect\, Intel\n\n\n\n\n\nIn-Depth Talks\n\n\n  \n\n\n\n\n \nTitle\nVideo\n \nSlides\n\n\n\n\n\n\nPast\, Present and Future of P4\nDeb Chatterjee\, Sr Director Software Engineering\, Intel\n\n\n\n\n\n\nCompiler-assisted Kernel-based P4 Pipeline Offloading Using Intel IPU\nDeb Chatterjee\, Sr Director Software Engineering\, Intel\nNeha Singh\, Staff Software Engineer\, Intel\n\n\n\n\n\n\nTowards the Performant P4C\nAnton Korobeynikov\, Principal Software Engineer\, Compiler Development\, Access Softek Toolchains\n\n\n\n\n\n\nSupporting PTP-1588 in BMv2: A Proposed Ingress and Egress Timestamping Scheme\nBill Pontikakis\, Sr Research Associate\, Polytechnique Montréal\nFrançois-Raymond Boyer\, Professeur\, Polytechnique Montréal \n\n\n\n\n\n\n\nSONiC DASH on Intel IPU2100\nShweta Shrivastava\, Cloud Software Engineer\, Intel\nNamrata Limaye\, Director Software Engineering\, Intel \n\n\n\n\n\n\nInternals of the Intel Tofino Compiler\nGlen Gibb\, Compiler Engineer\, Intel\n\n\n\n\n\n\nP4-SpecTec – Mechanized Language Definition for P4\nJaehyun Lee\, Student\, KAIST\n\n\n\n\n\n\nCentralized Telemetry and Security Enforcement Using SONiC and P4\nShekher Bulusu\, Sr Manager Software Engineering\, GEICO\nPawan Ravi\, Sr Staff Engineer\, GEICO\nJames Choi\, Sr Engineering Manager\, GEICO\n\n\n\n\n\n\nModeling Hardware Blocks of Network ASICs using P4\nJean Tourrilhes\, Researcher\, HPE\n\n\n\n\n\n\nIn-Memory Key-Value Store Live Migration with NetMigrate\nZeying Zhu\, PhD Student\, University of Maryland\n\n\n\n\n\n\nP4-Based Automated Reasoning (P4-BAR) for the (Networking) Masses!\nSteffen Smolka\, Staff Software Engineer\, Google\nJonathan DiLorenzo\, Software Engineer\, Google\n\n\n\n\n\n\nScaling P4-Based Automated Reasoning (Performance and Coverage)\nAli Kheradmand\, Senior Software Engineer\, Google\nMeghana Sistla\, PhD Student\, University of Texas at Austin\n\n\n\n\n\n\nP4HIR: Toward Bridging P4C with MLIR\nBili Dong\, Software Engineer\, Google\n\n\n\n\n\nDemos\n\n  \n\n\n\n\n \nTitle\n \nAbstract\n\n\n \n\n\n\nSONiC DASH on Intel IPU2100\nNamrata Limaye\, Director Software Engineering\, Intel \n\n\n \n\n\n\nData Center Routing GEICO SDN Controller and GEICO SONiC Using P4\nSunil Kumar Rawookar\, Staff Engineer\, GEICO Tech\n\n\n \n\n\n\nOffload NAT and Routing onto Intel IPU Using P4-TC\nNeha Singh\, Staff Software Engineer\, Intel\n\n\n \n\n\n\nP4 IDE: An Integrated Development Environment for P4-based Data Plane Development\nNamrata Limaye\, Director Software Engineer\, Intel\n\n\n \n\n\nP4Docker: Simplifying P4 Switch Testbeds with Docker Integration \nLucas Trombeta\, PhD Candidate\, Federal University of ABC (UFABC)\n\n\n \n\n\n\nSupporting PTP-1588 in BMv2: A Proposed Ingress and Egress Timestamping Scheme\nBill Pontikakis\, Sr Research Associate\, Polytechnique Montréal\nFrançois-Raymond Boyer\, Professeur\, Polytechnique Montréal \n\n\n\n\nPoster\n\n  \n\n\n\n\n \nTitle\nAbstract\n\n\n\n\n\n\nBabel: The Tower So Far\nVictor Rios\, Software Engineer\, Google\n\n\n\n\nGeneral Chair – Nate Foster \nProgram Co-Chairs – Andy Fingerhut\, Muhammad Shahbaz \nProgram Committee\n– Jehandad Khan\, AMD\n– Ori Rottenstreich\, Technion\n– Vishal Shrivastav\, Purdue University\n– Gianni Antichi\, Politecnico di Milano and Queen Mary University of London\n– Ben Pfaff\, Feldera\n– Ajay Lotan Thakur\, Intel Corp\n– Victor Liu\, University of Michigan\n– Vladimir Gurevich\, P4ica\n– Tushar Swamy\, unaffiliated\n– Yiming Qiu\, University of Michigan\n– Amedeo Sapio\, Amazon Web Services\n– Lavanya Jose\, Google
URL:https://p4.org/event/2024-p4-workshop-postevent/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=UTC:20241025T080000
DTEND;TZID=UTC:20241025T080000
DTSTAMP:20250915T225333Z
CREATED:20250912T220258Z
LAST-MODIFIED:20250915T225333Z
UID:10000123-1729843200-1729843200@p4.org
SUMMARY:Japan P4 Users Group
DESCRIPTION:The 2024 Japan P4 Users Group was hosted as a hybrid in-person and online event and included P4-related presentations and exhibits. View the agenda and resources. Talks were presented in Japanese and video can be accessed here.
URL:https://p4.org/event/japan-p4-users-group/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20241028T080000
DTEND;TZID=UTC:20241028T080000
DTSTAMP:20250915T225259Z
CREATED:20250912T215845Z
LAST-MODIFIED:20250915T225259Z
UID:10000079-1730102400-1730102400@p4.org
SUMMARY:7th European P4 Workshop (EuroP4’24)
DESCRIPTION:Sponsored by AMD \n \n  \nThe 7th edition of EuroP4 was held on October 28th in conjunction with the 32nd IEEE International Conference on Network Protocols (ICNP 2024)\, in Charleroi\, Belgium. \nEuroP4’24 brings together networking researchers and practitioners to discuss cutting-edge\, P4-enabled research and P4-based technology. The workshop provides a venue for presenting and discussing research and projects related to P4\, as well as for more broadly discussing the needs of this research community. The workshop aims to forge new connections between researchers who already work with P4\, introduce more networking researchers to the P4 community\, and seed future top-tier publications\, innovation and contributions to this community. \nKeynotes\nShir Landau Feibish\, Senior Lecturer (Assistant Professor)\nDepartment of Mathematics and Computer Science\, Open University of Israel\nShir is a Senior Lecturer (Assistant Professor) and head of the RUNS lab at The Open University of Israel. Before joining The Open University\, Shir was a postdoctoral researcher at Princeton University. \nShir’s main interests are network telemetry and programmable networks. Her work focuses on building tools for network monitoring by tailoring streaming methods and compact data structures to the computational model and constraints of programmable devices. Shir has received several awards including the Eric and Wendy Schmidt Postdoctoral Award for Women in Mathematical and Computing Sciences and was named one of the Rising Stars in Networking and Communications of 2020 by the N2Women Organization. \n“Time-Aware Network Telemetry in the Data Plane” \nAbstract: Collecting network telemetry is essential for detecting problems in the network. In recent years we have seen an abundance of research on network telemetry in the data plane. Many of these solutions analyze traffic continuously over a long period of time\, while resetting the structure from time to time. If shorter time intervals are needed\, sliding windows are usually used\, yet these incur significant resource and management overhead. However\, often in order to understand what is happening in the network we need to measure events that have recently happened.  \nWe explore the concept of time-aware network telemetry and propose several different paradigms that we utilize for various telemetry tasks. The first is a reactive monitoring scheme for packet loss detection\, that monitors only when needed\, by tailoring the measurement interval to when losses may occur. The second is a mechanism for finding heavy hitter flows of the recent past. Finally\, we explore the option of deleting and decaying a set-membership data structure to allow for more updated information to be maintained.  \n \nMario Baldi\, Fellow\nAMD Research and Advanced Development\nMario Baldi is a Fellow at AMD\, Research and Advanced Development\, and Associate Professor of Information Processing Systems (currently on leave) at Politecnico di Torino (Technical University of Turin)\, Italy. He has held various positions in startup and established companies in the computer networking industry\, as well as several visiting professorships at Universities in four continents\, during over 25 years of professional involvement in the computer networking domain. He authored over 150 scholarly papers on various networking related topics and two books\, and is co-inventor in 35 patents. \n“SmartNICs – P4’s Final Latest Frontier – Challenges and Opportunities Ahead”\nAbstract: While P4 emerged and got established as a language to program packet processing in switches\, it has since been successfully adopted in the context of programmable SmartNICs . This talk first overviews the widely differing architectures of programmable SmartNICs currently available on the market and then discusses the challenges we encounter when deploying P4 for programming them\, as well as the opportunities ahead.\n \nAgenda\n8:00-9:00 – Registration\n  \n9:00-9:10 – Welcome\nSandor Laki – Program Chair\, ELTE Eötvös Loránd University\nSlides\n  \n9:10-10:10 – Industrial Keynote – “SmartNICs – P4’s Final Latest Frontier – Challenges and Opportunities Ahead”\nMario Baldi\, Fellow\, AMD Research and Advanced Development\nSlides\n  \n10:10-10:30 – Coffee break\n  \n10:30-11:00 – “SCION Edge Router for Legacy IP Applications based on Intel Tofino”\nLars-Christian Schulz\, Robin Wehner\, David Hausheer (OVGU Magdeburg\, Germany)\nSlides | Paper\n  \n11:00-11:30 – “P4chaskey: An Efficient MAC Algorithm for PISA Switches”\nMartim Francisco\, Bernardo Ferreira\, Fernando M. V. Ramos (University of Lisbon\, Portugal)\, Eduard Marin (Telefonica Research\, Spain)\, Salvatore Signorello (Telefonica Research\, Spain; University of Lisbon\, Portugal)\nSlides | Paper\n  \n11:30-12:00 – “Deliberately Congesting a Switch for Better Network Functions Performance”\nMariano Scazzariello (KTH Royal Institute of Technology\, Sweden)\, Tommaso Caiazzi (Roma Tre University \,Italy)\, Marco Chiesa (KTH Royal Institute of Technology\, Sweden)\nSlides | Paper\n  \n12:00-14:00 – Lunch break\n  \n14:00-15:00 – Scientific Keynote: “Time-Aware Network Telemetry in the Data Plane”\nShir Landau Feibish\, Assistant Professor\, Open University of Israel \n15:00-15:30 – “Secure In-Band Network Telemetry for the SCION Internet Architecture on Tofino”\nRobin Wehner\, Tony John\, Lars-Christian Schulz\, David Hausheer (OVGU Magdeburg\, Germany)\nSlides | Paper\n  \n15:30-16:00 – Coffee break\n  \n16:00-16:30 – “Towards Real-Time Intrusion Detection in P4-Programmable 5G User Plane Functions”\nAristide Tanyi-Jong Akem (IMDEA Networks Institute\, Spain; Universidad Carlos III de Madrid\, Spain)\, Marco Fiore (IMDEA Networks Institute\, Spain)\nSlides | Paper\n  \n16:30-16:40 – Closing words\n  \nWORKSHOP ORGANISERS \nGeneral Chairs:\n– Fernando Ramos\, University of Lisbon\n– Muhammad Shahbaz\, Purdue University \nProgram Chairs:\n– Amedeo Sapio\, Amazon Web Services (AWS)\n– Sandor Laki\, ELTE Eötvös Loránd University \nPublicity Chair:\n– Csaba Györgyi\, ELTE Eötvös Loránd University / University of Vienna \nProgram Committee:\n– Andreas Kassler (Karlstad University\, Sweden; Technische Hochschule Deggendorf\, Germany)\n– Francesco Paolucci (CNIT\, Italy)\n– Stefan Schmid (TU Berlin\, Germany)\n– Christian E. Rothenberg (University of Campinas\, Brasil)\n– Noa Zilberman (Oxford University\, UK)\n– Gergely Pongrácz (Ericsson\, Hungary)\n– Andy Fingerhut (Cisco Systems\, USA)\n– Nik Sultana (Illinois Institute of Technology\, USA)\n– Sebastiano Miano (Politecnico di Milano\, Italy)\n– Sebastian Gallenmüller (TU Munich\, Germany)\n– Mingyuan Zang (Technical University of Denmark\, Denmark)\n– Masoud Hemmatpour (The Arctic University of Norway\, Norway)\n– Alan Zaoxing Liu (University of Maryland\, USA)
URL:https://p4.org/event/7th-european-p4-workshop-europ424/
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