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DTSTAMP:20260429T091212
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LAST-MODIFIED:20260122T175551Z
UID:10000142-1768982400-1768982400@p4.org
SUMMARY:P4 Developer Days - In-Network Inference with P4: From Stateless to Hybrid Approaches
DESCRIPTION:P4 Developer Days webinar\, “In-Network Inference with P4: From Stateless to Hybrid Approaches” \nView Slides \nView Video \nAbstract\nIn-network machine learning (ML) techniques employ the P4 language to embed trained ML models directly into programmable network data planes. This has enabled novel applications in network security\, routing optimization\, and traffic classification\, amongst others. This presentation charts the evolution of these techniques\, starting with stateless\, packet-level inference models like Henna. It then explores the shift to stateful\, flow-level approaches as demonstrated in Flowrest. The talk culminates with Jewel\, a novel hybrid system that performs joint packet and flow-level inference for improved accuracy and efficiency. This journey from stateless to hybrid methodologies highlights the advancements and trade-offs in building intelligent\, high-performance\, and ML-empowered networks with P4.\n\n \nSpeaker\nAristide Akem is a Lecturer in Computer Science within the Cyberphysical Systems Group in the School of Electronics and Computer Science at the University of Southampton. Before joining Southampton\, he was a postdoctoral researcher in the Computing Infrastructure Group at the University of Oxford. His research spans machine learning\, network programming with P4\, and mobile networking\, with applications in network security\, IoT\, and energy. He earned his PhD from Universidad Carlos III de Madrid and IMDEA Networks Institute\, following a Master of Science in Electrical and Computer Engineering from Carnegie Mellon University Africa\, and a Master’s in Telecommunications Engineering from the University of Yaounde I.
URL:https://p4.org/event/p4-developer-days-in-network-inference-with-p4-from-stateless-to-hybrid-approaches/
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BEGIN:VEVENT
DTSTART;TZID=UTC:20260204T080000
DTEND;TZID=UTC:20260204T090000
DTSTAMP:20260429T091212
CREATED:20251007T163320Z
LAST-MODIFIED:20260213T141052Z
UID:10000154-1770192000-1770195600@p4.org
SUMMARY:P4 Developer Days - Programmable Data Planes for the Cloud Era: Harnessing P4 on FPGA based SmartNICs
DESCRIPTION:In case you missed it\, you can now view the recording of this P4 Developer Days webinar\, “Programmable Data Planes for the Cloud Era: Harnessing P4 on FPGA-based SmartNICs”\n\n\n\nView Video\nView Slides\n\nAbstract\nThe exponential growth of cloud-native services\, 5G connectivity\, and data-intensive applications is driving unprecedented demand for high-throughput and flexible packet processing. Traditional fixed-function ASIC solutions\, while performant\, lack the adaptability to address emerging tunnelling protocols\, dynamic QoS enforcement\, and evolving custom workloads. P4\, an open and protocol-independent programming language for the data plane\, directly addresses these limitations by enabling developers to rapidly define and deploy advanced packet pipelines without RTL complexity. By combining FPGA Vendors P4 Compilers like Altera’s P4 Suite with iW-Fibre SmartNICs\, operators can synthesize programmable pipelines that sustain line-rate performance while remaining fully adaptable. \nDemonstration of the use cases – including checksum verification\, IP-in-IP tunnelling\, VXLAN encapsulation/decapsulation\, and standards-based QoS metering—illustrate how P4 empowers service providers and data centers to stay agile\, scalable\, and future-ready. \nSpeaker\nChethan T V is an Electronics an Communications Engineer possessing diverse experience in embedded industry as a digital design engineer with extensive expertise in FPGA design flow and SoC lifecycle. With strong project management skills\, he has led various challenging projects from conceptualization stage to execution and delivered successful products in the field of defense\, video\, military & commercial sectors. He is an Associate Director\, FPGA BU\, iWave Global – leading the Smart-NIC division from the ground up\, building a high-performing team\, and driving strategic projects in next-generation networking.
URL:https://p4.org/event/p4-developer-days-programmable-data-planes-for-the-cloud-era-harnessing-p4-on-fpga-based-smartnics/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Vancouver:20260304T080000
DTEND;TZID=America/Vancouver:20260304T090000
DTSTAMP:20260429T091212
CREATED:20251024T165254Z
LAST-MODIFIED:20260306T175333Z
UID:10000155-1772611200-1772614800@p4.org
SUMMARY:P4 Developer Days - P4Muse (P4 Modularity and Unification for Seamless Extensibility)
DESCRIPTION:Register to attend this P4 Developer Days webinar\, “P4Muse (P4 Modularity and Unification for Seamless Extensibility”\nDate: March 4\, 2026\nTime: 8:00am Pacific \nSlides (PDF) | Watch Recording \nAbstract\n\n\n\nDomain-specific programming languages such as P4 enable flexible and high-performance packet processing in programmable network data planes. However\, most P4 programs remain monolithic\, limiting the development of modular and reusable protocols and libraries. Introducing modularity to P4 has been challenging because existing approaches—such as trans-compilers and virtualization—operate outside the P4 language and compiler\, reducing backward compatibility and extensibility. P4Muse (P4 Modularity and Unification for Seamless Extensibility) addresses this challenge by introducing a compiler-managed approach to modularity within the P4C compiler. Without requiring any new syntax or annotations\, P4Muse introduces new compiler passes for automatic code merging\, enabling modular design\, reuse\, and seamless integration of complex network functionalities. Our results show that P4Muse effectively supports modular P4 program development without altering existing P4 syntax\, providing a robust solution that significantly improves code reusability\, flexibility\, and extensibility while maintaining backward compatibility. \n\n\n\n\nSpeakers\nMohsen Rahmati is a Ph.D. candidate in Computer Engineering at Polytechnique Montréal\, supervised by Professors Yvon Savaria\, François-Raymond Boyer\, and Jean-Pierre David. His research focuses on compiler design for programmable networks\, emphasizing modularity and reusability in the P4 language. He is the creator of P4Muse\, a compiler-managed modularity framework (accepted in IEEE Access\, 2025)\, and P4O2\, an object-oriented-inspired modularity in P4 currently under review at IEEE Access. \n\n  \nFrançois-Raymond Boyer received B.Sc. and Ph.D. degrees in computer science from Université de Montréal\, Montreal\, QC\, Canada\, in 1996 and 2001\, respectively. Since 2001\, he has been with Polytechnique Montréal\, Montréal\, where he is currently a Professor with the Department of Computer and Software Engineering. He has authored or co-authored more than 30 conference and journal papers. His current research interests include microelectronics\, performance optimization\, parallelizing compilers\, digital audio\, and body motion capture. He is a member of Regroupement Stratégique en Microélectronique du Québec\, Groupe de Recherche en Microélectronique et Microsystèmes\, and Observatoire Interdisciplinaire de Création et de Recherche en Musique.
URL:https://p4.org/event/p4-developer-days-p4muse-p4-modularity-and-unification-for-seamless-extensibility/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=UTC:20260319T080000
DTEND;TZID=UTC:20260319T090000
DTSTAMP:20260429T091212
CREATED:20251117T170038Z
LAST-MODIFIED:20260320T115620Z
UID:10000156-1773907200-1773910800@p4.org
SUMMARY:P4 Developer Days - SpliDT: Partitioned Decision Trees for Scalable Stateful Inference at Line Rate
DESCRIPTION:Register to attend this P4 Developer Days webinar\, “SpliDT: Partitioned Decision Trees for Scalable Stateful Inference at Line Rate”\nMarch 19 at 11 am ET/4 pm CET \nSlides (PDF) || Watch Recording \n\n\n\nAbstract\nMachine learning is increasingly used in programmable data planes\, such as switches and smartNICs\, to enable real-time traffic analysis and security monitoring at line rate. Decision trees (DTs) are particularly well-suited for these tasks due to their interpretability and compatibility with the Reconfigurable Match-Action Table (RMT) architecture. However\, current DT implementations require collecting all features upfront\, which limits scalability and accuracy due to constrained data plane resources. This paper introduces SpliDT\, a scalable framework that reimagines DT deployment as a partitioned inference problem over a sliding window of packets. \nBy dividing inference into sequential subtrees—each using its own set of top-k features—SpliDT supports more stateful features without exceeding hardware limits. An in-band control channel manages transitions between subtrees and reuses match keys and registers across partitions\, implemented using P4 for packet recirculation and control-plane coordination. This design allows physical resources to be shared efficiently while maintaining line-rate processing. To maximize accuracy and scalability\, SpliDT employs a custom training and design-space-exploration (DSE) workflow that jointly optimizes feature allocation\, tree depth\, and partitioning. Evaluations show that SpliDT supports up to 5x more features\, scales to millions of flows\, and outperforms baselines\, with low overhead and minimal time-to-detection (TTD). \n\n\nSpeaker\nMurayyiam Parvez is a Ph.D. candidate in the Department of Computer Science at Purdue University\, advised by Professor Muhammad Shahbaz and Professor Sonia Fahmy. Her research focuses on designing the next generation of hybrid software–hardware abstractions and architectures for emerging network security and machine learning applications\, with an emphasis on leveraging programmable switches to enable high-performance\, in-network intelligence. \n\nRegister to attend this webinar!
URL:https://p4.org/event/p4-developer-days-splidt-partitioned-decision-trees-for-scalable-stateful-inference-at-line-rate/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=America/Vancouver:20260430T080000
DTEND;TZID=America/Vancouver:20260430T090000
DTSTAMP:20260429T091212
CREATED:20260403T165242Z
LAST-MODIFIED:20260403T165346Z
UID:10000158-1777536000-1777539600@p4.org
SUMMARY:P4 Developer Days – OpenDesc: Describing NIC-Host Interfaces
DESCRIPTION:Register to attend this P4 Developer Day webinar on April 30 at 11 am ET/5 pm CET \nOpenDesc: Describing NIC-Host Interfaces\n\n\nAbstract\nModern NIC hardware is increasingly expressive\, yet host software remains shackled to static\, device-specific descriptors and ad-hoc glue layers. We present OpenDesc\, a framework that leverages P4 to define the interface between host and NIC. By treating software intent and hardware capabilities as negotiable P4 programs\, OpenDesc automatically compiles minimalist\, application-specific driver datapaths for metadata. This approach eliminates the “lowest common denominator” bottleneck\, enabling seamless metadata exchange and hardware-software co-design across heterogeneous NIC architectures. \nSpeaker\nSeyyidahmed is a systems researcher at imec. His research interests include the co-design of programmable hardware and high-performance networking stacks\, with a focus on improving the flexibility\, programmability\, and efficiency of modern networked systems. \n\n\nRegister to attend this virtual & free event
URL:https://p4.org/event/devday-opendesc/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=America/Vancouver:20260513T080000
DTEND;TZID=America/Vancouver:20260513T090000
DTSTAMP:20260429T091212
CREATED:20260407T160827Z
LAST-MODIFIED:20260409T172827Z
UID:10000159-1778659200-1778662800@p4.org
SUMMARY:P4 Developer Days – P4TC Provisioning And Runtime Control API
DESCRIPTION:Register to attend this P4 Developer Day webinar on May 13 at 11 am ET/5 pm CET \nP4TC Provisioning And Runtime Control API\n\n\nAbstract\nThe P4TC Control APIs consist of two primary interfaces built on the netlink framework: one for provisioning P4 program manifestations in the Linux kernel and another for managing the P4 runtime. This talk focuses on the P4TC runtime\, which employs P4 annotations to link datapath constructs with the control plane. These annotations are converted by the compiler into a JSON format\, allowing runtime control applications to introspect both control and data path constructs. \nArchitecturally\, the P4TC runtime API is inspired by the REST paradigm\, employing resource-oriented paths as nouns and a refined set of verbs. The verbs follow CRUD (Create\, Read\, Update\, and Delete) principles and include specialized extensions for event publish-subscribe functionality. By using “paths” to target specific datapath objects\, the API remains agnostic regarding the nature of those objects – implying a control application does not need to change for multitudes of P4 programs. \nSpeaker\nFor more than twenty years\, Jamal Hadi Salim has been a leader in the evolution of networking and Software-Defined Networking (SDN). He is a major contributor to the Linux kernel networking subsystem and the current maintainer of the Traffic Control (tc) subsystem. Currently\, he leads the P4TC initiative\, which enables P4 programs to run directly within the Linux kernel. \nHis previous leadership roles include serving as the chair for the IETF SDN working group on Forwarding and Control Element Separation (ForCES). During his tenure\, he developed a ForCES implementation used in large-scale telecommunications and authored multiple SDN standards. Currently\, Jamal is concentrating on the performance of AI/ML\, with a specific emphasis on networking protocols and infrastructure. \n\n\nRegister to attend this virtual & free event \nFurther Reading\nWant to learn more about P4TC? Check out their blog
URL:https://p4.org/event/p4tc-may-13/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=America/Vancouver:20260520T080000
DTEND;TZID=America/Vancouver:20260520T090000
DTSTAMP:20260429T091212
CREATED:20260310T142654Z
LAST-MODIFIED:20260409T151432Z
UID:10000157-1779264000-1779267600@p4.org
SUMMARY:P4 Developer Days – EdgeP4: In-Network Edge Intelligence for a Tactile Cyber-Physical System Testbed Across Cities
DESCRIPTION:Register to attend this P4 Developer Day webinar on May 20 at 11 am ET/5 pm CET \nEdgeP4: In-Network Edge Intelligence for a Tactile Cyber-Physical System Testbed Across Cities\n\n\nAbstract\nTactile Internet based operations\, e.g.\, telesurgery\, rely on the human operator for end-to-end closed loop control to achieve accuracy. While feedback and control are subject to network latency and packet loss\, critical operations such as pose correction\, fiducial marking\, tremor reduction\, etc. are tasks that should be carried out automatically and thus dispensing with these feedback signals from traversing the network to the other end. We designed two edge intelligence algorithms hosted at P4 programmable end switches placed 400 km apart. These algorithms locally compute and command corrective signals. We implement these algorithms entirely on the data plane on Netronome Agilio SmartNICs. “pose correction” is placed at the edge switch connected to an industrial robot gripping a tool. \nThe round trip between transmitting force sensor array readings to the edge switch and receiving correct tip coordinates at the robot is shown to be less than 100µs. “tremor suppression” is placed at the edge switch connected to the operator. It suppresses physiological tremors\, which improves the application’s performance and also reduces the network load up to 99.9%. Our EdgeP4 framework allows edge intelligence modules to seamlessly switch between the algorithms based on the tasks being executed by devices connected to their ports. \n\nSpeaker\nDeepak Choudhary is currently a master’s student and a research assistant at Aalto University\, Finland. His research interests primarily lie in Systems and Networking\, specifically in software-defined networking and programmable data planes. Previously\, he spent 2.5 years as a research assistant at the Indian Institute of Science (IISc). His work there focused on developing a P4-programmable Time-Sensitive Networking (TSN) switch and testing them on wide-area network testbeds. \n\nRegister to attend this virtual & free event
URL:https://p4.org/event/edgep4-may20/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=America/Vancouver:20260610T080000
DTEND;TZID=America/Vancouver:20260610T090000
DTSTAMP:20260429T091212
CREATED:20260428T123842Z
LAST-MODIFIED:20260428T124340Z
UID:10000160-1781078400-1781082000@p4.org
SUMMARY:P4 Developer Days – A Multi-Site Testbed for Heterogeneous P4 Data Plane Experimentation on Research Cyberinfrastructure
DESCRIPTION:Register to attend this P4 Developer Day webinar on June 10 at 11 am ET/5 pm CET \nA Multi-Site Testbed for Heterogeneous P4 Data Plane Experimentation on Research Cyberinfrastructure\n\n\nAbstract\nThis presentation introduces a multi-site testbed that unifies three distinct classes of P4-programmable hardware\, FPGA SmartNICs (AMD Alveo)\, DPUs (NVIDIA BlueField)\, and software switches (BMv2)\, under a single Kubernetes control plane on the National Research Platform (NRP). We detail the architecture that uses ESnet’s SENSE orchestrator for dynamic multi-domain Layer 2 path provisioning and a unified shell automation framework for reproducible experiments. We also share critical lessons learned from integrating heterogeneous targets and running a real-world deployment. This work provides a blueprint for building and operating advanced\, reproducible P4 experimentation infrastructure for the research community. \nSpeaker\nMohammad Firas Sada is a researcher at SDSC specializing in deep learning\, high-performance computing (HPC)\, and advanced networking. His work within the Nautilus Kubernetes cluster at the National Research Platform focuses on distributed AI workflows\, network programmability\, hardware acceleration with novel compute architectures\, and scalable cyberinfrastructure for data-intensive science. His interests include optimizing AI training across GPU clusters\, accelerating scientific computing with programmable networks\, and developing tools for large-scale data movement and workflow automation. He enjoys working with talented teams to foster collaboration\, exchange ideas\, and advance research in computing. \n\n\nRegister to attend this virtual & free event
URL:https://p4.org/event/p4-data-plane/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=America/Vancouver:20260709T080000
DTEND;TZID=America/Vancouver:20260709T090000
DTSTAMP:20260429T091212
CREATED:20260428T130542Z
LAST-MODIFIED:20260428T130542Z
UID:10000162-1783584000-1783587600@p4.org
SUMMARY:P4 Developer Days – MORP4: A Dynamic Network Telescope
DESCRIPTION:Register to attend this P4 Developer Day webinar on July 9 at 9 am PT/11 am ET/5 pm CET \nMORP4: A Dynamic Network Telescope\n\n\nAbstract\nA network telescope passively monitors unsolicited traffic reaching unused Internet address space advertised to the global routing system. For more than two decades\, network telescopes have allowed unique global visibility into a wide range of Internet phenomena. However\, telescopes are afflicted by two main issues: progressive erosion due to IPv4 space unavailability and blacklisting. To overcome these issues\, we propose MORP4\, a programmable data-plane framework implementing a “dynamic” network telescope. \nMORP4 accurately and adaptively tracks unused space of an organization’s network with configurable time and space granularity and captures only traffic directed towards unused addresses at line rate. We provide an implementation in P4 and Python/C++\, and deploy it on a Tofino switch. We show that it can detect unused IPv4 address space at the finest granularity (/32) while operating at line rate and provide an effective approach for operating a telescope in the IPv6 domain. \nSpeaker\nIliana is a fourth-year PhD student in Computer Science at Georgia Tech\, supervised by Prof. Dainotti. Her research focuses on interdomain routing security and Internet measurements. She holds a Diploma in Electrical and Computer Engineering from the National Technical University of Athens. Iliana is particularly interested in detecting and analyzing BGP routing anomalies and conducting network telescope measurements with the use of programmable switches. Her work aims to shed more light on current trends in misconfigurations and attacks in both the control and data planes. Iliana is also a recipient of the Onassis Foundation Scholarship. \n\n\nRegister to attend this virtual & free event
URL:https://p4.org/event/morp4/
CATEGORIES:Events
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