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X-WR-CALDESC:Events for P4 - Language Consortium
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BEGIN:VEVENT
DTSTART;TZID=UTC:20171110T080000
DTEND;TZID=UTC:20171110T190000
DTSTAMP:20260421T214552
CREATED:20250912T215923Z
LAST-MODIFIED:20250915T231556Z
UID:10000094-1510300800-1510340400@p4.org
SUMMARY:P4 Developer Day Fall 2017
DESCRIPTION:A joint presentation by Stanford University and P4 Language Consortium.\n  \nHeld at Arrillaga Alumni Center\, Stanford University on Friday\, November 10\, 2017.\n  \nWe would like to thank our sponsors for their support:\n  \n \nAgenda\n\n8:00 – 8:30am \n\nRegistration and Breakfast\n\n\n8:30 – 9:00am \n\nTechnical Set-up for Hands-on Lab\n\nIn order to complete the exercises at the Fall 2017 P4 Developer Day\, we have created a virtual machine that has all of the required software installed. Note that this download and setup can take around 45 minutes.\nTo build the virtual machine:\n\nStep 1: Install VirtualBox https://virtualbox.org/\nStep 2: Install Vagrant: https://vagrantup.com/\nStep 3: Clone the tutorial repository:\n$ git clone https://github.com/p4lang/tutorials\n\nStep 4: Go to the vm directory:\n$ cd tutorials/P4D2_2017_Fall/vm/\n\nStep 5: Build the virtual machine:\n$ vagrant up\n\nStep 6: Login and restart: Log in with username p4 and password p4 and issue the command\nsudo shutdown -r now\nWhen the machine reboots\, you should have a graphical desktop machine with the required software pre-installed.\n\n\n\n\n\n\n9:00 – 9:10am \n\nWelcome and Introductions\n\nRobert Soulé\, Università della Svizzera Italiana (USI) \n\n\n\n\nVideo for this session is available here.\n\n9:10 – 10:45am \n\nIntroduction to Data Plane Programming\nLanguage Basics\n\nby Stephen Ibanez\, Stanford University\n\n\n\nSession 1 will provide a hand-on introduction to P4. Students will start by implementing a “Hello World”-style application to gain an understanding of P4 concepts. The lesson will progressively introduce core language features\, such as header/metadata types\, packet parsers\, and controls. By the end of this session\, students will be able to implement a basic IP router. \n\nSlides for this session are available here.\nVideo for this session is available here.\n\n\n10:45 – 11:15am \n\nBreak\n\n\n11:15 – 12:00pm \n\nSoftware Tools and P4 Runtime\n\nby Carmelo Cascone and Brian O’Connor\, Open Networking Foundation (ONF)\n\n\n\nSession 2 will cover software tools that are essential to developing P4 applications. Students will learn how to invoke the the P4 compiler\, run the debugger\, and start a P4 software switch. This session will also introduce the control-plane interfaces via P4 Runtime\, a protocol-independent API auto-generated from the definition of a packet processing pipeline written in P4. \n\nSlides for this session are available here.\nVideo for this session is available here.\n\n\n12:00 – 1:30pm \n\nLunch\n\n\n1:30 – 3:00pm \n\nMonitoring and Debugging\n\nby Mina Tahmasbi (Princeton University)\n\n\n\nSession 3 will focus on a set of labs related to network monitoring and debugging. In this session\, students will gain a deeper understanding of P4 language concepts\, including custom headers and intrinsic metadata. In the first exercise\, students will implement Explicit Congestion Notification (ECN) to set a congestion bit in a packet header when the queue depth exceeds a threshold. In the second exercise\, MRI\, students will implement a simplified version of In-Band Network Telemetry to track the path that packets travel through the network. \n\nSlides for this session are available here.\nVideo for this session is available here.\n\n\n3:00 – 3:30pm \n\nBreak\n\n\n3:30 – 4:50pm \n\nAdvanced Data Structures\n\nby Samar Abdi (Google)\n\n\n\nSession 4 covers advanced data structures. In this session\, students will implement two data-plane applications. In the first\, source routing\, end-hosts specify paths through the network by using a stack of labels in the packet header. The switch must “pop” each label and forward out the appropriate interface. In the second\, students will implement a network calculator. Packets containing arithmetic expressions are sent to a switch. The switch will evaluate the expressions\, and return the results back to the sender. \n\nSlides for this session are available here.\nVideo for this session is available here.\n\n\n4:50 – 5:00pm \n\nBreak\n\n\n5:00 – 5:10pm \n\nClosing Remarks\n\nby Robert Soulé\, Università della Svizzera Italiana (USI)\n\n\n\n\nSlides for this session is available here.\n\n\n5:10 – 6:00pm \n\nPanel Discussion\n\nDejan Vucinic\, Western Digital\nMario Baldi\, Cisco Systems\nAnirudh Sivaraman\, NYU\nAnurag Agrawal\, Barefoot Networks\n\n\n\n\nVideo for this session is available here.\n\n\n6:00 – 7:00pm \n\nReception
URL:https://p4.org/event/p4-developer-day-fall-2017/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20170517T080000
DTEND;TZID=UTC:20170517T183000
DTSTAMP:20260421T214552
CREATED:20250912T215924Z
LAST-MODIFIED:20250915T231611Z
UID:10000095-1495008000-1495045800@p4.org
SUMMARY:4th P4 Workshop
DESCRIPTION:A joint presentation by Stanford University and P4 Language Consortium.\n  \nHeld at Arrillaga Alumni Center\, Stanford University on Wednesday\, May 17\, 2017.\nAgenda\n\n8:00 – 9:00 \n\nRegistration and Breakfast\n\n\n9:00 – 9:15 \n\nWelcome and Introductions\n\nProfessor Nick McKeown (Stanford) (slides) and Professor Nate Foster (Cornell) (slides)\n\n\n\n9:15 – 9:45 \n\nUpdates from the P4.org Working Groups\n\nLanguage Design (slides)\nArchitecture (slides)\nAPI (slides)\n\n\n\n9:45 – 10:05 \n\nP4 Program-dependent Controller Interface for SDN Applications\n\nSamar Abdi\, Waqar Mohsin\, Yavuz Yetim (Google) (slides)\n\n\n\n10:05 – 10:20 \n\nDemo Lightning Talks\n\n\nHigh-Fidelity Validation of P4 Networks with SONiC-P4 Software Switch and CrystalNet (slide)\n\n\nTool release: P4 to Wireshark packet dissector (slide)\n\n\nSAI behavioral model soft switch (slide)\n\nDAIET: Data Aggregation In nETwork (slide)\n\nLanguage-Directed Hardware Design for Network Performance Monitoring (slide)\n\n\nP4-NetFPGA Toolchain: Writing Stateful P4 Programs (slide)\n\n\n\n\n\n10:20 – 10:55 \n\nBreak and Demo Visits\n\n\n10:55 – 11:15 \n\nMaking the Switch: Coast to Coast Production P4 White Box Trial\n\nKen Duell (AT&T)\n\n\n\n11:15 – 11:35 \n\nHigh-Fidelity Validation of P4 Networks with SONiC-P4 Software Switch and CrystalNet\n\nHongqiang Liu\, Yibo Zhu (Microsoft Research); Jiaxin Cao\, Jitendra Padhye\, Guohan Lu\, Lihua Yuan (Microsoft) (slides)\n\n\n\n11:35 – 11:55 \n\ndRMT: Disaggregated Programmable Switching\n\nSharad Chole\, Andrew Fingerhut\, Sha Ma (Cisco Systems);Anirudh Sivaraman (Massachusetts Institute of Technology); Shay Vargaftik (Technion);Alon Berger\, Gal Mendelson (Technion); Mohammad Alizadeh (Massachusetts Institute of Technology);  Shang-Tse Chuang\, Isaac Keslassy (Technion/VMware); Ariel Orda (Technion); Tom Edsall (Cisco Systems); (slides)\n\n\n\n11:55 – 12:15 \n\nNetCache: Fast In-Network Caching for Key-Value Stores\n\nXin Jin (UC Berkeley and JHU); Xiaozhou Li (Barefoot Networks); Haoyu Zhang (Princeton University); Robert Soulé (Barefoot Networks and Università della Svizzera italiana); Jeongkeun Lee (Barefoot Networks); Nate Foster (Barefoot Networks and Cornell University); Changhoon Kim (Barefoot Networks); Ion Stoica (UC Berkeley) (slides)\n\n\n\n12:15 – 12:30 \n\nDemo Lightning Talks\n\n\nPiggybacking Network Functions on SDN with P4 support (slide)\n\n\n100G In-Band Network Telemetry with P4 and FPGA (slide)\n\n\nProposal for a PPPoE Demo (slide)\n\n\nT4P4S: A P4 compiler for a wide variety of targets (slide)\n\n\nUniform Timestamping in P4 (slide)\n\n\nTrack every congestion at any queue in your network (slide)\n\nPerformant Stateful Security Functions in P4 and C (slide)\n\n\n\n\n12:30 – 2:00 \n\nLunch and Demo Visits\n\n\n2:00 – 2:20 \n\nThe Software Architecture of the P4-16 Reference Compiler\n\nMihai Budiu (VMware Research); Chris Dodd (Barefoot Networks) (slides)\n\n\n\n2:20 – 2:40 \n\nLanguage-Directed Hardware Design for Network Performance Monitoring\n\nSrinivas Narayana\, Anirudh Sivaraman\, Vikram Nathan\, Prateesh Goyal (MIT); Venkat Arun (IIT Guwahati); Mohammad Alizadeh (MIT);  Vimalkumar Jeyakumar (Cisco Tetration analytics); Changhoon Kim (Barefoot networks) (slides)\n\n\n\n2:40 – 3:00 \n\nExecutable Formal Semantics of P4 and Applications\n\nAli Kheradmand\, Grigore Rosu (University of Illinois at Urbana Champaign) (slides)\n\n\n\n3:00 – 3:20 \n\nA Program Logic for Automated P4 Verification\n\nNate Foster (Barefoot Networks/Cornell University); Cole Schlesinger (Barefoot Networks); Robert Soulé (Barefoot Networks/Universita della Svizzera italiana); Han Wang (Barefoot Networks) (slides)\n\n\n\n\n3:20 – 3:55 \n\nBreak and Demo Visits\n\n\n3:55 – 4:15 \n\nThe Extensible Network – Evolution in Protocol and Data Plane Agility\n\nDaniel Bernier (Bell Canada); Milad Sharif (Barefoot Networks) (slides)\n\n\n\n4:15 – 4:35 \n\nHybrid P4 Switch\n\nAshkan Aghdai\, Yang Xu\, H. Jonathan Chao (New York University) (slides)\n\n\n\n4:35 – 4:55 \n\nDeploying P4 Applications in Server-Based Networks\n\nAbhijeet Prabhbune\, Bapi Vinnakota (Netronome); Huynh Tu Dang\, Fernando Pedone\, Robert Soulé (Università della Svizzera italiana) (slides)\n\n\n\n4:55 – 5:15 \n\nSonata: Scalable Streaming Analytics for Network Telemetry\n\nArpit Gupta (Princeton University); Ankita Pawar (Unaffiliated); Rob Harrison (Princeton University); Rüdiger Birkner (ETH Zürich); Marco Canini (KAUST); Nick Feamster\, Jennifer Rexford (Princeton University); Walter Willinger (NIKSUN Inc.) (slides)\n\n\n\n5:15 – 5:30 \n\nClosing Remarks\n\n\n5:30 – 6:30 \n\nReception\n\n\nDemos:\nThe following demos will be running in Fischer Conference Center and can be visited during breaks. \n\nPiggybacking Network Functions on SDN with P4 support\n\nChang Liu\, Arun Raghuramu\, Chen-Nee Chuah (University of California Davis); Balachander Krishnamurthy (AT&T Labs-Research) (slide)\n\n\nProposal for a PPPoE Demo\n\nShabbir Khan\, Ashok Malani (XFLOW RESEARCH INC.) (slide)\n\n\nTool release: P4 to Wireshark packet dissector\n\nGeorgios Nikolaidis (Barefoot Networks) (slide)\n\n\nSAI behavioral model soft switch\n\nYonatan Piasetzky (Mellanox); Guohan Lu (Microsoft) (slide)\n\n\nLanguage-Directed Hardware Design for Network Performance Monitoring\n\nSrinivas Narayana\, Anirudh Sivaraman\, Vikram Nathan\, Prateesh Goyal (MIT); Venkat Arun (IIT Guwahati); Mohammad Alizadeh (MIT);  Vimalkumar Jeyakumar (Cisco Tetration analytics); Changhoon Kim (Barefoot networks) (slide)\n\n\nP4-NetFPGA Toolchain: Writing Stateful P4 Programs\n\nStephen Ibanez (Stanford University); Gordon Brebner (Xilinx Labs) (slide)\n\n\n100G In-Band Network Telemetry with P4 and FPGA\n\nPavel Benáček\, Viktor Puš (CESNET\, a.l.e.); Michal Kekely\, Lukáš Richter (Netcope Technologies a.s.); Pavel Minařík\, Jan Pazdera (Flowmon Networks a.s.) (slide)\n\n\nT4P4S: A P4 compiler for a wide variety of targets\n\nSandor Laki (Eötvös Loránd University) (slide)\n\n\nUniform Timestamping in P4\n\nHakim Weatherspoon\, Dhruv Singhal\, Jingbo Wang (Cornell University) (slide)\n\n\nTrack every congestion at any queue in your network\n\nJeongkeun Lee\, Jithin Thomas (Barefoot Networks) (slide)\n\n\nHigh-Fidelity Validation of P4 Networks with SONiC-P4 Software Switch and CrystalNet\n\nYibo Zhu\, Hongqiang Liu (Microsoft Research); Jiaxin Cao\, Jitendra Padhye\, Guohan Lu\, Lihua Yuan (Microsoft) (slide)\n\n\nPerformant Stateful Security Functions in P4 and C\n\nJaco Joubert\, David George\, Bapi Vinnakota (Netronome) (slide)\n\n\nDAIET: Data Aggregation In nETwork\n\nAmedeo Sapio\, Ibrahim Abdelaziz\, Marco Canini\, Panos Kalnis (KAUST) (slide)\n\n\n\nSponsors:\nAT&T    Barefoot Networks    Cisco    Google    Netronome    Xilinx\n 
URL:https://p4.org/event/4th-p4-workshop/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20170516T080000
DTEND;TZID=UTC:20170516T183000
DTSTAMP:20260421T214552
CREATED:20250912T215855Z
LAST-MODIFIED:20250915T231639Z
UID:10000088-1494921600-1494959400@p4.org
SUMMARY:P4 Developer Day Spring 2017
DESCRIPTION:A joint presentation by Stanford University and P4 Language Consortium.\n  \nHeld at Arrillaga Alumni Center\, Stanford University on Tuesday\, May 16\, 2017.\n  \nAgenda\n\n8:00 – 9:00 \n\nRegistration and Breakfast\n\n\n9:00 – 9:10 \n\nWelcome and Introductions\n\nProfessor Nick McKeown (Stanford) and Professor Nate Foster (Cornell) \n\n\n\n9:10 – 10:40 \n\nP4_16 Tutorial (Part 1)\n\nby P4.org\n\n\nThe full set of slides for P4_16 tutorial are available here.\n\n\n10:40 – 11:00 \n\nBreak\n\n\n11:00 – 12:30 \n\nP4_16 Tutorial (Part 2)\n\nby P4.org \n\n\n\n\n12:30 – 1:30 \n\nLunch\n\n\n1:30 – 4:00 \n\nHands-on Lab (Parallel Track – McCaw Hall)\n\nP4_16 BMv2\n\nby P4.org\n\n\nPlease follow the following instructions to get setup for the BMv2 Lab:\n\nDownload and install the latest version of Virtual Box\, version 5.1.22\, for your platform here.\nDownload the P4 D2 2017 virtual appliance (.ova) file here. This is a large(~3GB) file and can take a while to download depending on your download speed.\nDouble click the virtual appliance (.ova) file downloaded in step 1 or Import it using instructions here.\nThe minimum system requirements are 8GB (16GB preferred) and ~32GB free space on hard-drive.\nHere are login credentials for the VM – username/password p4/p4 \nThe presentation used for giving instructions for getting setup and an overview of the exercises is available here.\n\n\n\n\n\n1:30 – 4:00 \n\nHands-on Lab (Parallel Track – Fisher Room)\n\nP4_16 NetFPGA\n\nby NetFPGA\nSlides used in this session are available here.\n\n\n\n\n\n\n4:00 – 4:20 \n\nBreak\n\n\n4:20 – 5:20 \n\nTalk (Parallel Track – McCaw Hall)\n\nP4 mapping to Barefoot Tofino\n\nby Barefoot Networks\nSlides used in this session are available here.\n\n\n\n\n\n4:20 – 5:20 \n\nTalk (Parallel Track – Fisher Room)\n\nP4 mapping to Netronome SmartNIC\n\nby Netronome\nSlides used in this session are available here.\n\n\n\n\n\n  \n5:20 – 5:30 \n\nClosing Remarks\n\n\n5:30 – 6:30 \n\nReception\n\n\n\nSponsors:\n  \nAT&T    Barefoot Networks    Cisco    Google
URL:https://p4.org/event/p4-developer-day-spring-2017/
CATEGORIES:Events
END:VEVENT
END:VCALENDAR