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X-WR-CALDESC:Events for P4 - Language Consortium
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TZID:UTC
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DTSTART:20170101T000000
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BEGIN:VEVENT
DTSTART;TZID=UTC:20230414T111500
DTEND;TZID=UTC:20230414T111500
DTSTAMP:20260417T062526
CREATED:20250912T220230Z
LAST-MODIFIED:20250915T225541Z
UID:10000117-1681470900-1681470900@p4.org
SUMMARY:FOSSASIA Summit 2023
DESCRIPTION:April 14th | 11:15 am SGT \nAris Cahyadi Risdianto\, ONF Ambassador and Research Fellow\, National University of Singapore\, presented “Develop and Verify Networking Program with P4 and Mininet\,” at FOSSASIA Summit 2023. \nAbstract: P4 (programming protocol-independent packet processors) is a special language to define how the network packet forwarding process is built independently from the underlying hardware. It can be used to dynamically reconfigure the forwarding process on the different target hardware\, such as ASIC\, FPGA\, or SmartNIC. Users can write complete networking programs that includes in-band telemetry/measurement\, traffic load-balancing\, anti-DDoS\, packet broker\, and offload protocols. The program can be tested using widely available network emulator\, called Mininet\, so that the behavior of packet forwarding can be verified before it is deployed in the real target hardware. In this presentation\, we will quickly go through on how the P4 program looks like\, how to compile\, and how it is verified using Mininet emulator software.
URL:https://p4.org/event/fossasia-summit-2023/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20230220T143000
DTEND;TZID=UTC:20230302T160000
DTSTAMP:20260417T062526
CREATED:20250912T220224Z
LAST-MODIFIED:20250915T225616Z
UID:10000114-1676903400-1677772800@p4.org
SUMMARY:2023 APRICOT APNIC 55
DESCRIPTION:March 1st | 2:30 – 4:00 pm | Visayas Ballroom \nView Video (1:29) \nCheck out this insightful tutorial\, “P4 Programming Protocol-Independent Packet Processor”\, now on-demand\, by ONF Ambassador and National University of Singapore (NAS) Research Fellow\, Aris Cahyadi Risdianto. In his talk he provides an introduction to P4 and data plane programmability using the P4 programming language\, concluding with a demo on programming a switch using P4.
URL:https://p4.org/event/2023-apricot-apnic-55/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221209T080000
DTEND;TZID=UTC:20221209T080000
DTSTAMP:20260417T062526
CREATED:20250912T220205Z
LAST-MODIFIED:20250915T225647Z
UID:10000108-1670572800-1670572800@p4.org
SUMMARY:Euro P4 2022
DESCRIPTION:EuroP4 2022 took place December 9th and was held in conjunction with CoNEXT 2022 (December 6-9\, 2022) in Rome\, Italy. \nThe 5th European P4 Workshop (EuroP4) brought together networking researchers to discuss cutting-edge P4-based research and projects\, P4-based tools\, and the needs of the community. The workshop created an opportunity to forge connections between researchers\, introduce more networking researchers to the P4 community\, and seed future top-tier publications and innovation. \nView proceedings from the Euro P4 Workshop. \nSESSION: Security\nBACKORDERS: Using Random Forests to Detect DDoS Attacks in Programmable Data Planes \nBruno Coelho (Federal University of Rio Grande do Sul (UFRGS))\, Alberto Schaeffer-Filho (Federal University of Rio Grande do Sul (UFRGS)\nNetworks and the services they support form the communication backbone of our society\, and it is important that potential Distributed Denial of Service (DDoS) attacks are detected quickly\, in order to avoid or minimize the impact they may have on the availability of services. Recent technological advances in programmable networks – specifically the programmability of data planes in switches and routers\, have made available new ways of detecting such attacks. By relying on this newfound possibility\, this paper proposes the utilization of a Random Forest (RF) to aid in quickly and accurately detecting DDoS attacks in a programmable switch. Random forests utilize several classification trees\, each of them for independently classifying an input as one of a set of classes. Here\, each decision tree will classify a network flow as potentially malicious\, i.e. part of a DDoS attack\, or a legitimate user flow. Despite utilizing multiple classification trees to improve accuracy\, random forests are relatively lightweight\, with each tree requiring few and simple computations to arrive at a classification. Our results show that even small RFs\, requiring as few as 63 match+action table entries\, can achieve F1-Scores of over 90%. \nRead Paper | View Slides\n  \nA P4-Based Content-Aware Approach to Mitigate Slow HTTP POST Attacks\nChih-Yu Hsieh (National Taiwan University)\, Hong-Yen Chen (National Taiwan University)\, Shan-Hsiang Shen (National Taiwan University of Science and Technology)\, Chen-Hsiang Hung (National Taiwan University)\, Tsung-Nan Lin (National Taiwan University)\nA slow HTTP POST attack is an application-layer distributed denial-of-service attack targeting web servers. The attacker simulates a legitimate user with a slow network speed and continues to send requests\, resulting in server resources being unavailable for a long time to other users. The similarity to legitimate behavior makes it challenging to identify such attack traffic. To address this issue\, this paper proposes a responsive defense mechanism that exploits programmable network devices to identify attack traffic based on HTTP headers. With information that is not available from legacy network devices\, this method can identify different types of requests and apply limitations. This approach achieves a distributed\, source-based defense capability by utilizing data plane programmability\, making it a scalable solution. The simulation results show that the approach is effective and accurate against slow HTTP POST attacks. \nRead Paper | View Slides\n  \nOn Implementing ChaCha on a Programmable Switch (Short Paper)\nYutaro Yoshinaka (Osaka University)\, Junji Takemasa (Osaka University)\, Yuki Koizumi (Osaka University)\, Toru Hasegawa (Osaka University)\nThis paper presents an implementation of a practical cryptographic primitive based on ChaCha on a Tofino programmable switch. A key challenge is optimizing the implementation by leveraging the structure of ChaCha operations and hardware features of Tofino. Our implementation outperforms the AES-based approach in terms of performance and small memory footprint and achieves up to 203 Gbps of throughput. \nRead Paper | View Slides\n\nSESSION: Architecture and Language\nReducing P4 Language’s Voluminosity using Higher-Level Constructs\nAlbert Gran Alcoz (ETH Zürich)\, Coralie Busse-Grawitz (ETH Zürich)\, Eric Marty (ETH Zürich)\, Laurent Vanbever (ETH Zürich) \nOver the last years\, P4 has positioned itself as the primary language for data-plane programming. Despite its constant evolution\, the P4 language still “suffers” from one significant limitation: the voluminosity of its code. Today\, P4 users overcome this limitation by relying on templating tools\, hand-crafted scripts\, and complicated macros. Unfortunately\, these methods are not optimal: they make the development process difficult and do not generalize well beyond one codebase. \nIn this work\, we propose reducing the voluminosity of P4 code by introducing higher-level language constructs. We present O4\, an extended version of P4\, that includes three such constructs: arrays (which group same-type entities together)\, loops (which reduce simple repetitions)\, and factories (which enable code parametrization).\nRead Paper | View Slides \nCompiling Packet Programs to dRMT Switches: Theory and Algorithms\nBalázs Vass (Budapest University of Technology and Economics)\, Ádám Fraknói (Eötvös Loránd University)\, Erika Bérczi-Kovács (Eötvös Loránd University)\, Gábor Rétvári (Budapest University of Technology and Economics) \nA critical step in P4 compilation is finding an efficient mapping of the high-level P4 source code constructs to the physical resources exposed by the underlying hardware\, while meeting data and control flow dependencies in the program. In this paper\, we take a new look at the algorithmic aspects of this problem\, with the motivation to understand the fundamental theoretical limits and obtain better P4 pipeline embeddings in the dRMT (disaggregated Match-Action Table) switch architecture. We report mixed results. We find that optimizing P4 program embedding for maximizing throughput is computationally intractable even when some architectural constraints are relaxed\, and there is no hope for a tractable approximation with arbitrary precision unless P = NP. At the same time\, we find that the maximal throughput embedding is approximable in quasi-linear time with a small constant bound. Our evaluations show that the proposed algorithm outperforms the heuristics of prior work both in terms of throughput and compilation speed. \nRead Paper | View Slides \n\n\n\nIn-Network Fractional Calculations using P4 for Scientific Computing Workloads \nShivam Patel (Illinois Institute of Technology)\, Rigden Atsatsang (Illinois Institute of Technology)\, Kenneth M Tichauer (Illinois Institute of Technology)\, Michael H L S Wang (Fermilab)\, James B Kowalkowski (Fermilab)\, Nik Sultana (Illinois Institute of Technology)\nRecent P4 research has motivated the need for in-network fractional calculations to support functions in Networking (for calculations related to active queue management and load balancing) and in Machine Learning. The P4 language and ASICs do not natively support fractional types (e.g.\, float). \n\nThis paper re-thinks the foundation of in-network fractional calculation and proposes a new approach that is more resource conscious and is straightforward to encode in P4. Instead of floating-point\, it uses a fixed-point encoding of numerals; and instead of sampling functions into tables it uses Taylor Approximation to reduce data-plane calculations to simple arithmetic over pre-calculated coefficients\, requiring constant space and linear time. The paper describes and evaluates a P4 code synthesis algorithm that allows users to trade-off switch resources for accuracy\, grounded on an application of a well-understood mathematical theory. It describes how to encode π and various functions including cos\, log and exp. \nRead Paper \nHOL4P4: Semantics for a Verified Data Plane \nAnoud Alshnakat (KTH Royal Institute of Technology)\, Didrik Lundberg (KTH Royal Institute of Technology\, Saab AB)\, Roberto Guanciale (KTH Royal Institute of Technology)\, Mads Dam (KTH Royal Institute of Technology)\, Karl Palmskog (KTH Royal Institute of Technology)\nWe introduce a formal semantics of P4 for the HOL4 interactive theorem prover. We exploit properties of the language\, like the absence of call by reference and the copy-in/copy-out mechanism\, to define a heapless small-step semantics that is abstract enough to simplify verification\, but that covers the main aspects of the language: interaction with the architecture via externs\, table match\, and parsers. Our formalization is written in the Ott metalanguage\, which allows us to export definitions to multiple interactive theorem provers. The exported HOL4 semantics allows us to establish machine-checkable proofs regarding the semantics\, properties of P4 programs\, and soundness of analysis tools. \nRead Paper | View Slides\n  \nSESSION: Monitoring and Applications\nCausal Network Telemetry \n\nYunhe Liu (Cornell University)\, Nate Foster (Cornell University)\, Fred B. Schneider (Cornell University)\nCurrent approaches to network observability rely on techniques like active probing\, packet sampling\, and path-level telemetry\, which only provide a partial view. This paper presents causal telemetry\, a new model that adapts ideas from distributed systems to the network setting. Causal telemetry captures causal relationships between events\, including those that take place on physically separated devices. We motivate causal telemetry through examples\, we show how it can be used to diagnose anomalies and faults\, and we present algorithms for constructing the needed causal graphs from network executions. We develop a P4-based prototype implementation\, CoCaTel\, and discuss a case study that uses causal telemetry to detect Priority-Based Flow Control (PFC) deadlocks. \nRead Paper | View Slides\n  \nInnovative network monitoring techniques through In-band Inter Packet Gap Telemetry (IPGNET)\nFrancisco Germano Vogt (University of Campinas)\, Fabricio Rodriguez (University of Campinas)\, Christian Esteve Rothenberg (University of Campinas)\, Gergely Pongrácz (Ericsson Research)\nNetwork monitoring is a fundamental task for proper network troubleshooting and performance management. Recently\, in-band Network Telemetry (INT) has been demonstrated as a powerful and efficient network monitoring framework. Using INT\, network information hop-by-hop can be collected directly from the data plane by gathering this information in the production traffic. However\, INT data collection is limited by available packet size and processing overhead\, making it critical to choose what data to collect and when to collect it. In this demo\, we propose the In-band Inter Packet Gap Network Telemetry (IPGNET) per-hop monitoring. We argue that by monitoring the IPG hop-by-hop\, it is possible to correlate the data and identify: (i) Network problems like congestion and delays\, finding their root cause\, and (ii) Microbursts and their contributing flows. Our preliminary results show that IPGNET can detect microbursts on multiple queues and report all the contributing flows with high efficiency in terms of control/data plane overhead. \n\nRead Paper\n  \nSketch-based Entropy Estimation: a Tabular Interpolation Approach Using P4 (Short Paper)\nYu-Kuen Lai (Chung-Yuan Christian University)\, Se-Young Yu (International Center for Advanced Internet Research)\, Iek-Seng Chan (Chung-Yuan Christian University)\, Bo-Hsun Huang (Chung-Yuan Christian University)\, Che-Hao Chang (National Taiwan University)\, Jim Hao Chen (International Center for Advanced Internet Research)\, Joe Mambretti (International Center for Advanced Internet Research)\nThis work presents the implementation of a tabular interpolation approach to estimate empirical Shannon entropy on programmable data plane ASICs using P4. The technique transforms the complex computations of the random projection into fast lookup over pre-computed tables in the match-action pipeline. Likewise\, the interpolation heuristic further reduces the table size substantially. Thus\, more tables can be accommodated\, achieving higher estimation accuracy. Simulations based on real-world network traffic traces are performed to evaluate the estimation accuracy. The scheme is deployed in a Barefoot Tofino2 switch connected to the International Center for Advanced Internet Research (iCAIR) national testbed. The system can estimate the entropy of network traffic accurately at 400 Gbps throughput. \nRead Paper\n  \nIn-network Angle Approximation for Supporting Adaptive Beamforming \nHiba Mallouhi (ELTE Eötvös Loránd University\, Budapest\, Hungary)\, Jaspreet Kaur (University of Glasgow)\, Hasan Tahir Abbas (University of Glasgow)\, Sándor Laki (ELTE Eötvös Loránd University\, Budapest\, Hungary)\nBeamforming is now an integral feature of modern wireless communication systems and its implementation calls for an accurate beam alignment by estimating the direction of signal arrival. However\, this estimation is computationally complex\, especially in a dynamic environment where a user is constantly on the move. In this paper\, we propose a user-assisted in-network method to optimally approximate the angle of arrival by segmenting the cell area into an exponentially binned grid and make use of the advantages offered by programmable data planes and their match-action table (MAT) logic. The proposed method is implemented in P4 and runs on a Tofino ASIC. Our evaluation proves a theoretical bound on the absolute error of the proposed MAT-based angle approximation and shows that it is in accordance with the empirical error distributions. \n\nRead Paper | View Slides \nDistributed DNN Serving in the Network Data Plane\nKamran Razavi (Technical University of Darmstadt)\, George Karlos (Vrije Universiteit Amsterdam)\, Vinod Nigade (Vrije Universiteit Amsterdam)\, Max Mülhäuser (Technische Universität Darmstadt)\, Lin Wang (Technische Universität Darmstadt\, Vrije Universiteit Amsterdam)\nThere is a great interest in utilizing P4 for in-network computing along with programmable data planes. This use is emerging as a new network paradigm that can not just reduce the complexity but the delay as well. Beamforming is now an integral feature of modern wireless communication systems and its implementation calls for an accurate beam alignment by estimating the direction of signal arrival. However\, this estimation is computationally complex\, especially in a dynamic environment where a user is constantly on the move.\nIn this paper\, we propose a user-assisted in-network method to optimally approximate the angle of arrival by segmenting the cell area into an exponentially binned grid and make use of the advantages offered by programmable data planes and their match-action table (MAT) logic. The method expects location messages periodically reported by user equipment\, processes them in the network and reconfigures the base station antennas accordingly\, implementing user-assisted in-network beam control. The proposed method is implemented in P4 and runs on a Tofino ASIC. \nRead Paper | View Slides\n\n  \n\n\n\nOrganizer Co-Chairs \n\nGianni Antichi\, Queen Mary University of London\nFernando Ramos\, University of Lisbon\n\nTPC Co-Chairs \n\nMarco Chiesa\, KTH Royal Institute of Technology\nShir Landau Feibish\, Open University of Israel\n\nPublicity Chair \n\nMarco Savi\, University of Milano-Bicocca\n\n\nProgram Committee \n\nAlan Zaoxing Liu (Boston University)\nAmedeo Sapio (Intel)\nBen Pfaff (VMware)\nDaehyeok Kim (Microsoft Research)\nDamu Ding (University of Oxford)\nGábor Rétvári (Budapest University of Technology and Economics)\nHyojoon Kim (Princeton University)\nMihai Budiu (VMware Research)\nMina Tahmasbi Arashloo (University of Waterloo)\nMuhammad Shahbaz (Purdue University)\nOri Rottenstreich (Technion)\nRoberto Bifulco (NEC Laboratories Europe)\nSalvatore Signorello (University of Lisbon)\nSándor Laki (Eötvös Loránd University)\nSimone Ferlin (Red Hat\, Karlstad university)\n\n\n\n\n\n 
URL:https://p4.org/event/euro-p4-2022/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221205T080000
DTEND;TZID=UTC:20221205T080000
DTSTAMP:20260417T062526
CREATED:20250912T220223Z
LAST-MODIFIED:20250915T225653Z
UID:10000111-1670227200-1670227200@p4.org
SUMMARY:2022 P4 China Open Programmable Network Summit
DESCRIPTION:The 2022 P4 China Open Programmable Network Summit brings together experts\, scholars\, business executives\, and technical executives to discuss the practice\, development and trends of open programmable networks\, P4 languages\, and innovative applications of the network. Universities\, research institutes and companies in the academic salon will also share P4 scientific research experiences and collaboration. In addition\, the summit hosts an exhibition area. \nThe event is sponsored by Intel® and co-organizer\, Jiangsu Future Network Innovation Research Institute. \nThe Intel® 2022 P4 China Hackathon will be held in conjunction with the 2022 P4 China Open Programmable Network Summit. Learn more and register separately for this event. \n 
URL:https://p4.org/event/2022-p4-china-open-programmable-network-summit/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221122T090000
DTEND;TZID=UTC:20221122T090000
DTSTAMP:20260417T062526
CREATED:20250912T220205Z
LAST-MODIFIED:20250915T225711Z
UID:10000109-1669107600-1669107600@p4.org
SUMMARY:P4 Workshop Taiwan
DESCRIPTION:The P4 Workshop Taiwan is being hosted by NYCU. Industry and academia speakers with extensive P4 experience will discuss P4 use cases and academic research projects. This event is free for attendees. \n09:00 – 09:10  Opening Ceremony\nJason Yi-Bing Lin\, Lifetime Chair Professor (NYCU\, Taiwan) \n09:10 – 09:40  Keynote: Intel Tofino Expandable Architecture Platform Acceleration Kits\nDaniel Alvarez\, Marketing Director\, Switch Fabric Group\, Intel \n09:40 – 10:10  Japan P4 Community Update and Use Cases\nKentaro Ebisawa\, Principal Researcher\, Toyota Motor Corporation \n10:10 – 10:30  Break \n10:30 – 11:00  P4-enabled 5G UPF QoS Enhancement and Network Slicing\nYu-Shen Liu\, Accton Technology Corporation \n11:00 – 11:30  Intel Infrastructure Processing Unit and IPDK Introduction\nHenry Sun\, Intel \n11:30 – 12:00  Speeding Up Network FPGA Design Using P4\nKai-Feng Chou\, Intel \n12:00 – 12:10  Lunch Time (Demo) \n13:10 – 13:40  P4 Testbed and Inter-Domain In-Band Telemetry\nTe-Lung Liu\, Research Fellow\, NARLABs\, Taiwan \n13:40 – 14:10  Mitigating New-Flow Attack with SDN Snapshot in P4-based SDN\nMeng-Hsun Tsai\, Associate Professor\, NCKU\, Taiwan \n14:10 – 14:40  Heterogeneous UPF Integration Framework and 5G User Plan Acceleration\nChien-Chao Tsent\, Professor\, NYCU\, Taiwan \n14:40 – 15:10  Break (Poster/Demo) \n15:10 – 15:30  Instant Queue Occupancy Used for Automatic Traffic Scheduling in Data Center Networks\nChien Chen\, Jointly Appointed Professor\, NYCU\, Taiwan \n15:30 – 15:50  Using a P4 Hardware Switch to Block Trackers and Ads for All Devices on an Edge Network\nShie-Yuan Wang\, Professor\, NYCU\, Taiwan \n16:00 – 16:30  Intel Broadband Network Gateway Acceleration Kit (Intel BNG Acceleration Kit)\nPetr Kastovsky\, Software Product Manager\, Intel
URL:https://p4.org/event/p4-workshop-taiwan/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221118T080000
DTEND;TZID=UTC:20221118T080000
DTSTAMP:20260417T062526
CREATED:20250912T220223Z
LAST-MODIFIED:20250915T225716Z
UID:10000112-1668758400-1668758400@p4.org
SUMMARY:Intel® 2022 P4 China Hackathon
DESCRIPTION:The Intel® 2022 P4 China Hackathon aims to cultivate and discover outstanding P4 talents and help developers build network infrastructure\, machine learning and Applications in artificial intelligence\, high-performance computing\, network measurement and optimization\, network security and other scenarios will enhance the innovation ability of P4 developers and promote the construction of the P4 programmable network ecosystem.\n  \nThe Intel® 2022 P4 China Hackathon was initiated by Intel®\, ONF community initiative\, and co-organized by Jiangsu Future Network Innovation Research Institute. It is being held in conjunction with the P4 China Open Programmable Network Summit.
URL:https://p4.org/event/intel-2022-p4-china-hackathon/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221024T080000
DTEND;TZID=UTC:20221024T080000
DTSTAMP:20260417T062526
CREATED:20250912T220222Z
LAST-MODIFIED:20250915T225723Z
UID:10000110-1666598400-1666598400@p4.org
SUMMARY:Netdev 0x16
DESCRIPTION:Netdev 0x16\, is a conference focused on Linux kernel networking and user space utilization of the interfaces to the Linux kernel networking subsystem are the focus.\nAs part of this event\, a hands-on workshop presented by P4 community members will take place\, “Learn How to Program the Linux Kernel Data Path with P4”. The session will offer an introduction to P4 programming with available open source software. The tutorial will feature a hands-on component where participants will learn how to program custom packet processing logic into the Linux kernel through several open source P4 technologies. \n  \nSpeakers: \nFernando Ramos\, Associate Professor\, Instituto Superior Superior Técnico\, University of Lisbon\nSalvatore Signorello\, Invited Assistant Professor at Faculdade de Ciências da Universidade de Lisboa
URL:https://p4.org/event/netdev-0x16/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20221020T080000
DTEND;TZID=UTC:20221020T080000
DTSTAMP:20260417T062526
CREATED:20250912T220224Z
LAST-MODIFIED:20250915T230820Z
UID:10000113-1666252800-1666252800@p4.org
SUMMARY:P4 Users Japan 2022
DESCRIPTION:The Japan P4 Users Group will be held as a hybrid event with both in-person and online access. This in-person event includes both presentations by industry and academic members of the P4 community who will share their use cases\, insights and experiences with P4. The event will also feature exhibits. \nIn addition to live sessions\, pre-recorded presentations will be released on the day of the event as well. \nCheck out the full agenda.
URL:https://p4.org/event/p4-users-japan-2022/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20220826T080000
DTEND;TZID=UTC:20220826T080000
DTSTAMP:20260417T062526
CREATED:20250912T220204Z
LAST-MODIFIED:20250915T230826Z
UID:10000107-1661500800-1661500800@p4.org
SUMMARY:ACM SIGCOMM 2022
DESCRIPTION:Hackathon: P4 on Raspberry PI for Networking Education\nAugust 26th | 1:30pm – 6:00pm\n \nP4Pi is a low cost\, open source hardware platform intended for teaching and research purposes. P4Pi enables designing and deploying P4-based network devices using the Raspberry Pi board. By setting a target price tag of less than an academic book (under $100)\, P4Pi aims to enable a large number of academic institutes to provide hands-on experience in networking education. Furthermore\, as P4Pi is based on the popular Raspberry PI platform\, it appeals to other communities such as hobbyists and does not depend on a single-source provider. \nP4Pi is developed as part of the P4 Education Workgroup activities. The team aims to provide both educators and practitioners the knowledge and tools required to use P4Pi in class and at home\, including tutorials\, sample code\, tools and community support. \nThis hackathon aims to bring together members of the networking community for the following goals: (i) introduce P4Pi to networking researchers and educators\, enable them to get started with the platform and practice its use in lab-like environment. (ii) develop more teaching and supporting materials for the P4Pi ecosystem. (iii) enable researchers from all levels of expertise to develop P4Pi-based concepts and early-stage projects\, and to stimulate collaborations between new users. \nCheck out all the details here!
URL:https://p4.org/event/acm-sigcomm-2022/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20220524T080000
DTEND;TZID=UTC:20220526T080000
DTSTAMP:20260417T062526
CREATED:20250912T220203Z
LAST-MODIFIED:20250915T230839Z
UID:10000105-1653379200-1653552000@p4.org
SUMMARY:P4 2022 Workshop
DESCRIPTION:The P4 2022 Workshop incorporates insights and perspectives from P4 community members around the world and encompass topics related to: \n\nP4 language\nP4 compile targets\nP4 tool chain\nP4 use cases & apps\nControl plane or network OS for P4 targets\n\nCheck out all the talks from this exciting and informative event on-demand below! Or\, view full YouTube playlist. \n  \n\n\n\nKeynotes\n\n\n\n\n\nTITLE\nVIDEO\nSLIDES\n\n\n\n\n\n\nWelcome to P4 Workshop 2022!\nJK Lee\, Program Chair\, member of P4 TST\, Senior Principal Engineering\, Intel\n\n\n\n\n\n\n\nP4 on the Move!\nAndy Fingerhut\, Principal Engineer\, Intel\n\n\n\n\n\n\n\n\nProgrammable Network Devices: One Vendor’s Perspective\nKenneth Duda\, Founder\, CTO & SVP Software Engineering\, Arista Networks\n\n\n\n\n\n\n\nPanel – IPU/DPU\nBrad Burres\, Fellow\, Intel\nMatty Kadosh\, Principle Architect\, Nvidia\nKrishna Doddapaneni\, Co-founder\, VP Software Engineering\, Pensando\nGordon Brebner\, Senior Fellow\, AMD\n\n\n\n\n\n\n\nScaling SDN Policy Distribution\nBen Pfaff\, Principal Researcher\, VMware\n\n\n\n\n\n\n\nExpanding the P4 Universe\nGordon Brebner\, Senior Fellow\, AMD\n\n\n\n\n\n\n\n\nProgrammable Networking for a Distributed Edge\nNick McKeown\, SVP & GM and Senior Fellow\, Network & Edge Group\, Intel\nSachin Katti\, CTO\, Network & Edge Group\, Intel\n\n\n\n\n\n\n\n\nThe Journey Towards Predictable Network in Alibaba Cloud\nDennis Cai\, Head of Network Infrastructure\, Alibaba\n\n\n\n\n\n\n\n\nSONiC\, Programmability & Acceleration\nXin Liu\, Principal Product Manager\, Microsoft\n\n\n\n\n\n\n  \n\n\nLanguage\n\n\n\n\n\nTITLE\nVIDEO\nSLIDES\n\n\n\n\n\n\nExtend P4 to Support Runtime Programmability – In Depth Talk\nYong Feng\, Ph.D Student\, Tsinghua University\nDr. Haoyu Song\, Researcher\, Futurwei Technologies\n\n\n\n\n\n\n\n\nApplets\, a Portability and Composability Solution for P4 – In Depth Talk\nVenkat Pullela\, Chief of Technology\, Networking\, Keysight\nSurendra Anubolu\, Distinguished Engineer\, Broadcom\n\n\n\n\n\n\n\n\nPrimitives for Finite Field Arithmetic in Network Switches – In Depth Talk\nDaniel Seara\, MSc Student\, IST\, Universit of Lisbon\nBernardo Conde\, Master Student\, IST\, Universit of Lisbon\n\n\n\n\n\n\n\n\nNERPA: Network Programming with Relational and Procedural Abstractions – In Depth Talk\nDebnil Sur\, Senior Software Engineer\, VMware\n\n\n\n\n\n\n\n\nSuperP4: Preprocessor-Aware Syntax and Semantic Analysis for P4 Programs – Tech Brief\nKaarthik Alagappan\, Graduate Research Assistant\, University of Central Florida\n\n\n\n\n\n\n\n\nP4RROT: Generating P4 Code for the Application Layer – Tech Brief\nCsaba Györgyi\, PhD Student\, ELTE Eötvös Loránd University\nSandor Laki\, Assitant Professor\, ELTE Eötvös Loránd University\n\n\n\n\n\n\n\n  \n\n\n\n\n\nTarget\n\n\n\n\n\nTITLE\nVIDEO\nSLIDES\n\n\n\n\n\n\nConnection Tracking Using P4 – In Depth Talk\nAnjali Singhai Jain\, Principle Engineer\, Intel\nNishanth Bhat\, Intel\nNamrata Limaye\, Intel\n\n\n\n\n\n\n\n\nSpeeding Up Network FPGA Design Using P4 – In Depth Talk\nBert Klaps\, Senior Systems Engineer\, Intel\nMiroslaw Walukiewicz\, Intel\n\n\n\n\n\n\n\n\nLine Rate IPsec on a PNA-Compliant Packet Processing Pipeline – In Depth Talk\nSameer Kittur\, Distinguished Engineer\, Pensando Systems\n\n\n\n\n\n\n\n\nP4 Over Linux TC – In Depth Tal\nJamal Hadi Salim\, CEO\, Mojatatu Networks\n\n\n\n\n\n\n\n\nDevelop Your CPU Network Stack in P4 – In Depth Talk\nCristian Dumitrescu\, Software Architect for Packet Processing\, Intel\n\n\n\n\n\n\n\n\nP4 at the Interface Between NIC and Host – In Depth Talk\nRaghava Sivaramu\, Fellow\, Pensando Systems\n\n\n\n\n\n\n\nP4 in Open vSwitch with OfP4 – Tech Brief\nBen Pfaff\, Researcher\, VMware\n\n\n\n\n\n\n\nDeep Dive & Getting Started with PSA Implementation for eBPF – Tutorial\nTomasz Osiński\, Cloud Software Development Engineer\, Intel\nMateusz Kossakowski\, R&D Expert\, Orange Labs Poland\nJan Palimaka\, Chief R&D Specialist\, Orange Labs Poland\n\n\n\n\n\n\n\n\nPSA-eBPF: Portable Switch Architecture for eBPF – Tech Brief\nTomasz Osiński\, Cloud Software Development Engineer\, Intel\nMateusz Kossakowski\, R&D Expert\, Orange Labs Poland\nJan Palimaka\, Chief R&D Specialist\, Orange Labs Poland\n\n\n\n\n\n\n\n\n\nTool Chain\n\n\n\n\n\nTITLE\nVIDEO\nSLIDES\n\n\n\n\n\n\np4testgen: Automated Test Generation for Real-World P4 Data Planes – In Depth Talk\nFabian Ruffy\, Intern\, Intel and PhD Student\, NYU\n\n\n\n\n\n\n\nDynamic P4 Pipeline Configuration – In Depth Talk\nAnjali Singhai Jain\, Principle Engineer\, Intel\nHari Thantry\, Cloud Architect\, Google\n\n\n\n\n\n\n\n\nDifferential Testing of P4 Implementations Using CI/CD – Tech Brief\nParisa Ataei\, Postdoc Scholar\, Cornell University\n\n\n\n\n\n\n\n\nP4 Designer – Demo\nPratap Pellakuru\, Development Tools Software Architect\, Intel\nSharmila S.\, Cloud Software Development Engineer\, Intel\n\n\n\n\n\n\n\n\nIntroducing IPDK – Tutorial\nDeb Chatterjee\, Senior Director of Engineering\, Intel\n\n\n\n\n\n\n\n\n\nControl Plane and NOS\n\n\n\n\n\nTITLE\nVIDEO\nSLIDES\n\n\n\n\n\n\nEvolving P4 Runtime From Switch to DPU – In Depth Talk\nMilind Chabbi\, Nvidia\nAlan Lo\, Compiler/Cloud Architect\, Nvidia\n\n\n\n\n\n\n\n\nAccelerating 5G (Mobile Core) Control Plane Using P4 – In Depth Talk\nJingqi Huang\, Ph.D Student\, Purdue University\nJiayi Meng\, PhD Candidate\, Purdue University\n\n\n\n\n\n\n\nTable Driven Interface (TDI): Usages and Advantages – In Depth Talk\nSayan Bandyopadhyay\, Cloud Software Developer\, Intel\nJames Choi\, Cloud Software Architect\, Intel\n\n\n\n\n\n\n\nPINS Update and Roadmap – In Depth Talk\nBhagat Janarthanan\, Software Engineering Lead\, Google\nBrian O’Connor\, Intel\nVamsi Punati\, Google\nReshma Sudarshan\, Director of Applications Engineering\, Intel\n\n\n\n\n\n\n\nPINS Packet I/O – In Depth Talk\nSrikishen Pondicherry\, Software Engineer\, Google\nBrian O’Connor\, Intel\nDon Newton\, Intel\n\n\n\n\n\n\n\nP4-OVS Split Architecture – In Depth Talk\nNamrata Limaye\, Engineering Manager/Tech Lead\, Intel\nBrian O’Connor\, Intel\nAjay Kumar Dubey\, Intel\n\n\n\n\n\n\n\nP4 as a Single Source of Truth for SONiC DASH Use Cases on Both Softswitch and Hardware – In Depth Talk\nReshma Sudarshan\, Director of Applications Engineering\, Intel\nChris Sommers\, Sr. Software Architect\, Keysight\n\n\n\n\n\n\n\nPINS Getting Started – Tutorial\nJudy Snow\, ONF\nBrian O’Connor\, Intel\n\n\n\n\n\n\n\n\nApplication\n\n\n\n\n\nTITLE\nVIDEO\nSLIDES\n\n\n\n\n\n\nP4 FOR NIC – A CLOUD PROVIDER PERSPECTIVE – In Depth Talk\nHari Thantry\, Cloud Architect\, Google\n\n\n\n\n\n\n\nInband Network Telemetry (INT): History\, Impact and Future Directions – In Depth Talk\nJK Lee\, Sr. Principal Engineer\, Intel\nMukesh Hira\, Principal Engineer\, Networking and Security\, VMware\n\n\n\n\n\n\n\nNetwork Programmability “Squared” – In Depth Talk\nSatoru Matsushima\, Technical Meister\, Softbank\n\n\n\n\n\n\n\nArchitecture for Multi-Terabit Programmable Networking Functions – In Depth Talk\nPetr Kastovsky\, Product Marketing\, Intel\nGeorgios Nikolaidis\, Software Architect\, Intel\n\n\n\n\n\n\n\nA Change Detection Primitive for the Network Data Plane – In Depth Talk\nGonçalo Matos\, Researcher\, INESC-ID\n\n\n\n\n\n\n\nM-PolKA: Enabling and Exploiting Multipath Stateless Source Routing for Programmable Data Planes – In Depth Talk\nRafael S. Guimaraes\, Associate Professor\, Instituto do Espirito Santo\n\n\n\n\n\n\n\nPMNet: In-Network Data Persistence – In Depth Talk\nKorakit Seemakhupt\, Graduate Student\, University of Virginia\n\n\n\n\n\n\n\nService Mesh P4 Data Plane – In Depth Talk\nAnjali Singhai Jain\, Principle Engineer\, Intel\nMrittika Ganguli\, Intel\nValas Valancius\, Google\nNupur Jain\, Intel\n\n\n\n\n\n\n\nTowards In-Network Anomaly Detection – In Depth Talk\nJoão Romeiras Amado\, PhD Student\, INESC-ID\, University of Lisbon\n\n\n\n\n\n\n\nDemo of L2 Forwarding + Vxlan with Control Packet Flow Using P4-OVS – Demo\nNupur Uttarwar\, Cloud Software Engineer\, Intel\nSandeep Nagapattinam\, Cloud Software Engineer\, Intel\n\n\n\n\n\n\n\nP7 (P4 Programmable Patch Panel): An Instant 100G Emulated Network Testbed in a Pizza Box – Demo\nFabricio Rodriguez\, PhD Student\, UNICAMP\n\n\n\n\n\n\n\nEnabling WCMP in SONiC Using PINS and ONOS – Demo\nNillofar Toorchi\, MTS\, ONF\nDaniele Moro\, Cloud Software Development Engineer\, Intel\n\n\n\n\n\n\n\nTCP-INT: Lightweight INT in TCP Transport – Demo\nSimon Wass\, Cloud Software Engineer\, Intel\nMiao Mao\, Staff Software Engineer\, Baidu\n\n\n\n\n\n\n\nOpen SRv6 Project: Open Source for P4-based Edge Router – Demo\nWeiqiang Cheng\, Principle Architect of IP Network\, China Mobile\nJiang Liu\, Professor\, Beijing University of Posts and Telecommunications\n\n\n\n\n\n\n\nPath Tracing: Revealing the Unknowns about ECMP – Demo\nAhmed Abdelsalam\, Software Engineer\, Cisco Systems\n\n\n\n\n\n\n\nSD-Fabric (Part 1) – Tutorial\nCarmelo Cascone\, Cloud Software Development Engineer\, Intel\nCharles Chan\, Cloud Software Development Engineer\, Intel\n\n\n\n\n\n\n\nSD-Fabric (Part 2) – Tutorial\nCarmelo Cascone\, Cloud Software Development Engineer\, Intel\nCharles Chan\, Cloud Software Development Engineer\, Intel\n\n\n\n\n\n\n\nSD-Fabric (Part 3) – Tutorial\nCarmelo Cascone\, Cloud Software Development Engineer\, Intel\nCharles Chan\, Cloud Software Development Engineer\, Intel
URL:https://p4.org/event/p4-2022-workshop/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20220426T080000
DTEND;TZID=UTC:20220426T080000
DTSTAMP:20260417T062526
CREATED:20250912T220204Z
LAST-MODIFIED:20250915T230846Z
UID:10000106-1650960000-1650960000@p4.org
SUMMARY:SmartNICs Summit
DESCRIPTION:Don’t miss the P4 Workshop taking place at the SmartNICs Summit on Tuesday\, April 26th\, 1-pm. \nMario Baldi\, Pensando (Moderator)\nGordon Brebner\, AMD\nCarmelo Cascone\, Intel \n\n\n\nSession Description:\n\n\nP4 is a programming language for specifying how network devices such as switches\, routers\, and NICs process packets. Vendors have used it as the programming language of choice for many products\, such as the Cisco Silicon One chipsets\, the Barefoot Tofino switches\, the Pensando Distributed Services Cards\, the AMD SN1000 SmartNIC\, and the Aruba CX 10000 smart switch. It is particularly useful for today’s applications that employ software-defined networking (SDN). Using P4 makes network devices easier to program\, debug\, document\, maintain\, and update. The main ideas behind P4 are: \n– Close relationship with typical packet processing tasks. P4 programs specify how packet headers are parsed and what actions are taken based on field values. \n– Protocol independence: Network devices are not tied to specific protocols. \n-Target independence: Programmers can describe packet processing for any underlying hardware. \n– Reconfigurability in the field: Programmers can change the way switches process packets after deployment. \nThe P4 ecosystem includes an extensive range of products\, projects\, and services. The P4 website (p4.org) is a great source to learn about P4 and join the community. P4’s current tasks include the definition of a Portable NIC Architecture (PNA). Special Feature: Attendees will have opportunities to write P4 code and corresponding control plane functions.
URL:https://p4.org/event/smartnics-summit/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20211221T080000
DTEND;TZID=UTC:20211221T080000
DTSTAMP:20260417T062526
CREATED:20250912T220229Z
LAST-MODIFIED:20250915T230854Z
UID:10000115-1640073600-1640073600@p4.org
SUMMARY:2021 P4 Workshop Taiwan
DESCRIPTION:  \nThe P4 community which includes both industry and academia\, came together to share research and practical experience related to P4 technology and use cases. Check the agenda and presentations included as part of this forum which was held at National Yang Ming Chiao Tung University. \n\n\n\n\n\nPresentations\n\n\n\n\n\n\n\n\n \nTitle\nVideo\nSlides\n\n\n \n\n\n\nOpening Ceremony\nJason Yi-Bing Lin\, Lifetime Chair Professor\, NYCU\, Taiwan\n\n \n\n\n \n\n\n\nIntel® Intelligent Fabric Vision and P4 Technology\nTodd Koelling\, Director of Marketing and Technology Planning\, Intel\n\n\n\n \n\n\n\nRemote Priority Flow Control towards Source Flow Control (SFC)\nJeremias Blendin\, Staff Engineer\, Intel\n\n\n\n \n\n\n\nP4 Users Community Update\, Japan\nKentaro Ebisawa\, Principal Researcher\, Toyota Motor Corporation\n\n\n\n \n\n\n\nNext Generation P4 Equipment\nJian-Hao Chen\, Sr. Engineer\, Accton Technology Corporation\n\n\n\n \n\n\n\nNet-Gen Cloud-FMC Far Edge Architecture\nJames Yeh\, Kaloom\n\n\n\n \n\n\n\nP4 SONiC\nJimmy Ou\, Senior Engineer\, Accton Technology Corporation\n\n\n\n \n\n\n\nBotnet Traffic Detection\nMeng-Hsun Tsai\, Associate Professor\, NCKU\, Taiwan\n\n\n\n \n\n\n\nDesign and Implementation of P4 Virtual Networks\nBonnie Chen\, ITRI\, Taiwan\n\n\n\n \n\n\n\nP4-IPS: Deploying Intrusion Prevention System with Machine Learning on P4 Switch\nCharles Hung-Pin Wen\, Distinguished Professor\, NYCU\, Taiwan\n\n\n\n \n\n\n\nLonger Stay Less Priority: Flow length approximation used in traffic scheduling in Data Centers\nChien Chen\, Jointly Appointed Professor\, NYCU\, Taiwan\n\n\n\n \n\n\n\nP4-Enabled network Slicing and 5G User Plane Function\nChien-Chao Tseng\, Professor\, NYCU\, Taiwan\n\n\n\n \n\n\n\nServer Load Balancer Accelerator (SLBA) P4-based Solution\nPetr Kastovsky\, Software Product Manager\, Intel\n\n\n\n \n\n\n\nA Flow Control Scheme based on Per Hop and Per Flow in Commodity Switches for Lossless Networks\nShie-Yuan Wang\, Professor\, NYCU\, Taiwan
URL:https://p4.org/event/2021-p4-workshop-taiwan/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20211213T101500
DTEND;TZID=UTC:20211213T174500
DTSTAMP:20260417T062526
CREATED:20250912T220030Z
LAST-MODIFIED:20250915T230930Z
UID:10000104-1639390500-1639417500@p4.org
SUMMARY:4th P4 Workshop in Europe (EuroP4) 2021
DESCRIPTION:DECEMBER 13\, 2021 | VIRTUAL\nThe 4th European P4 Workshop (EuroP4) brought together networking researchers to discuss cutting-edge\, P4-based\, research. The workshop provided a venue for P4-based research and projects\, a place to discuss P4-based tools\, and the research community needs. The workshop aims to forge connections between researchers\, introduce more networking researchers to the P4 community\, and seed future top-tier publications and innovation. \nEuroP4 was held in conjunction with ACM/IEEE ANCS’21. \nGeneral Chair\nFernando Ramos\, University of Lisbon \nProgram Chairs\nMario Baldi\, Pensando Systems\nBen Pfaff\, VMware \nSteering Committee\nRobert Soulé\, Yale University\nNoa Zilberman\, University of Oxford \nOrganizing Committee\nPublicity Chair: Damu Ding\, University of Oxford\nHotcrp Chair: Francisco Pereira\, University of Lisbon \nTechnical Program Committee\nGianni Antichi\, Queen Mary University of London\nMina Tahmasbi Arashloo\, Cornell University\nGiuseppe Bianchi\, University of Rome Tor Vergata\nRoberto Bifulco\, NEC Laboratories Europe\nGordon Brebner\, Xilinx\nMihai Budiu\, VMware Research\nAndrea Campanella\, Open Networking Foundation\nMauro Campanella\, GARR\nMarco Chiesa\, KTN Royal Institute of Technology\nNate Foster\, Cornell University\nTheo Jepsen\, Stanford University\nSándor Laki\, Eötvös Loránd University\nShir Landau-Feibish\, Princeton University\nSebastiano Miano\, Queen May University of London\nBrian O’Connor\, Open Networking Foundation\nGergely Pongrácz\, Ericsson Research\nSalvatore Pontarelli\, Sapienza University\nGábor Rétvári\, Budapest University of Technology and Economics\nChristian Esteve Rothenberg\, University of Campinas\nStefan Schmid\, University of Vienna & TU Berlin \nAgenda\n10:15 – 10:30\nWelcome and Introductions\nMario Baldi and Ben Pfaff \n10:30 – 11:30\nKeynote talk by Bruce Davie\nSession Chair: Ben Pfaff \nTitle: Always in the Kitchen at Parties: Separating Guests from Infrastructure\nAbstract: There is an emerging consensus that the services necessary to operate a cloud\, including network virtualization\, isolation of tenants\, storage services\, etc.\, are good candidates for offloading from the general-purpose servers that host guest workloads. These infrastructure (or “overhead”) services have historically run in the same servers that host guest workloads\, but now the point of control is moving to IPUs (infrastructure processing units)\, DPUs (data processing units)\, and SmartNICs. The challenge is in developing offload processors that are both efficient for the required tasks and sufficiently flexible to allow continued innovation. This talk traces the long history of offloading services from the CPU to more specialised offload engines\, and speculates on how this offloading trend will impact the architecture of future cloud data centres. \nBio: Bruce Davie is a computer scientist noted for his contributions to the field of networking. He recently co-founded (with Larry Peterson) Systems Approach\, LLC\, to produce open source books and educational materials. He is a former VP and CTO for the Asia Pacific region at VMware. He joined VMware during the acquisition of Software Defined Networking (SDN) startup Nicira. Prior to that\, he was a Fellow at Cisco Systems\, leading a team of architects responsible for Multiprotocol Label Switching (MPLS). Davie has over 30 years of networking industry experience and has co-authored 17 RFCs. He was recognized as an ACM Fellow in 2009 and chaired ACM SIGCOMM from 2009 to 2013. He was also a visiting lecturer at the Massachusetts Institute of Technology for five years. Davie is the author of multiple books and the holder of more than 40 U.S. Patents. \n11:30 – 12:00\nVirtual coffee break \n12:00 – 13:30 \nSession 1: P4 Technology\nSession Chair: Gianni Antichi \nHigh-Performance Match-Action Table Updates from within Programmable Software Data\nPlanes\nBalachandher Sambasivam\, Maheswari Subramanian\, Deb Chatterjee\, Mallikarjuna Gouda\,\nSosutha Sethuramapandian\, Yogender Singh Saroha (Intel Corporation) \nWriting P4 Compiler Backend for ASIC IPU\nBalachandher Sambasivam\, Maheswari Subramanian\, Deb Chatterjee\, Mallikarjuna Gouda\,\nSosutha Sethuramapandian\, Yogender Singh Saroha (Intel Corporation) \nGeneric change detection (almost entirely) in the dataplane\nGonçalo Matos (INESC-ID\, Instituto Superior Técnico\, Universidade de Lisboa); Salvatore Signorello\n(LASIGE\, Faculdade de Ciências\, Universidade de Lisboa); Fernando M. V. Ramos (INESC-ID\, Instituto\nSuperior Técnico\, Universidade de Lisboa) \n13:30 – 14:30\nLunch break \n14:30 – 15:30\nSession 2: Posters and Demos\nSession Chair: Sebastiano Miano \nHeavy Hitter Detection on Multi-Pipeline Switches\nFábio Luciano Verdi (UFSCar/KTH Royal Institute of Technology); Marco Chiesa (KTH Royal Institute of\nTechnology) \nRealizing Zenoh with programmable dataplanes\nAlexandre Santos\, Jose Quevedo\, Daniel Corujo (Universidade de Aveiro and Instituto de\nTelecomunicações) \nTowards a Framework for One-sided RDMA Multicast\nXin Zhe Khooi\, Cha Hwan Song\, Mun Choon Chan (National University of Singapore) \nKubernetes Load-Balancing and Policy Using P4\nNupur Jain\, Anjali Singhai\, Vinoth Kumar Chandra Mohan\, Debashis Chatterjee\, Dan Daly (Intel) \nTowards a more programmable and performance-optimized Virtual Switch\nNamrata Limaye (Cloud Software Architect\, Intel); Debashis Chatterjee (Senior Director\, Intel) \nAchieving End-to-End Network Visibility with Host-INT\nTomasz Osiński (Open Networking Foundation & Warsaw University of Technology); Carmelo Cascone\n(Open Networking Foundation) \n15:30 – 16:00\nCoffee break \n16:00 – 17:30 \nSession 3: P4 Applications\nSession Chair: Theo Jepsen \nMitigation of IPv6 Router Spoofing Attacks with P4\nMoritz Mönnich\, Nurefşan Sertbaş Bülbül\, Doğanalp Ergenç\, Mathias Fischer (Universität Hamburg) \nBuilding an Internet Router with P4Pi\nRadostin Stoyanov (University of Oxford); Adam Wolnikowski (Humatics); Robert Soulé (Yale\nUniversity); Sándor Laki (Eötvös Loránd University); Noa Zilberman (University of Oxford) \nNetworked Answer to “Life\, The Universe\, and Everything”\nGiles Babich\, Keith Bengston\, Andrew Bolin\, John Bunton\, Yuqing Chen\, Grant Hampson\,\nDavid Humphrey\, Guillaume Jourjon (CSIRO) \n17:30 – 17:45\nClosing words
URL:https://p4.org/event/4th-p4-workshop-in-europe-europ4-2021/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20211201T080000
DTEND;TZID=UTC:20211201T080000
DTSTAMP:20260417T062526
CREATED:20250912T220014Z
LAST-MODIFIED:20250915T230944Z
UID:10000097-1638345600-1638345600@p4.org
SUMMARY:3rd P4 Workshop in Europe (EuroP4)
DESCRIPTION:A presentation by the P4 Language Consortium and ONF in conjunction with CoNEXT 2020\nHeld online on December 1\, 2020\nEuroP4 2020 is the third P4 Language Consortium event in Europe. It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world\, and to foster the growth of the P4 Community. \nTopics of an interest include\, but are not limited to: \n\nAll aspects of P4-based network protocol research\, including design\, specification\, verification\, implementation\, measurement\, testing\, and analysis.\nDesign\, analysis\, and evaluation of network architectures using P4 as a basis\, e.g.\, specific algorithms and protocols for network virtualization or future Internet architectures.\nNew applications enabled by P4\, including in-network computing and Big Data\, Video and Virtual Reality\, Mobile and Wireless Network Protocols and Applications\, Ubiquitous computing\, Internet-of-Things and Smart Cities.\nSecure\, reliable and dependable P4-based systems\, including all aspects of monitoring\, verification\, debugging and troubleshooting networks enabled by P4.\nP4-based and P4-NetFPGA based programmable data planes.\nP4 end-host networking\, offloading transport- and application-layer protocols to P4-enabled hardware.\nTools and frameworks for development using P4.\nContributions to the evolution of the P4 language.\n\nParticipation\nAs a consequence of the current situation of the COVID-19 pandemic and similar to CoNEXT’20\, EuroP4’20 will be a fully virtual (online) event. Please follow the updates on the CoNEXT’20 and our website for the details. \nRegistration\nRegistration is through CoNEXT 2020 \nGeneral Chairs\nNoa Zilberman\, University of Cambridge\nRobert Soulé\, Yale University \nProgram Chairs\nFernando Ramos\, University of Lisbon\nGabor Retvari\, Budapest University of Technology and Economics \nTechnical Program Committee (tentative)\nAurojit Panda\, New York University\nBen Pfaff\, VMware\nBrian O’Connor\, Open Networking Foundation\nChristian Rothenberg\, University of Campinas\nGianni Antichi\, Queen Mary University of London\nGordon Brebner\, Xilinx Labs\nJon Crowcroft\, University of Cambridge\nMarco Chiesa\, KTH Royal Institute of Technology\nMario Baldi\, Pensando Systems & Politecnico di Torino\nMina Tahmasbi Arashloo\, Cornell University\nNate Foster\, Cornell University\nPaolo Costa\, Microsoft Research\nRoberto Bifulco\, NEC Labs Europe\nSandor Laki\, Eötvös Loránd University\nShir Landau Feibish\, Princeton University\nTheo Jepsen\, Stanford University
URL:https://p4.org/event/3rd-p4-workshop-in-europe-europ4/
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20211109T080000
DTEND;TZID=UTC:20211110T080000
DTSTAMP:20260417T062526
CREATED:20250912T220029Z
LAST-MODIFIED:20250915T230953Z
UID:10000102-1636444800-1636531200@p4.org
SUMMARY:OCP Global Summit 2021
DESCRIPTION:ONF hosted a pavilion at the event featuring demos of several of our open source projects. \n\nAether: Software-Defined Private 5G\nSD-Fabric: Full Stack P4 Programmable Network Fabric\nSD-RAN: O-RAN Compliant nRT-RIC and xApps\nPINS: Bringing P4 and SDN to SONiC\nVOLTHA: Virtual OLT Hardware Abstraction for PON\n\nPresentation: “P4 Integrated Network Stack (PINS)”\nView Recording \nSpeakers:\nBhagat Janarthanan\, Google\nReshma Sudarshan\, Intel\nBrian O’Connor\, ONF\nPINS is a P4Runtime based network switch stack built on top of the SONiC framework. The PINS stack combines the benefits of the SDN controller with SONiC and brings optionality to SDN networking. This presentation will cover the architecture\, the high-level design\, and the various supplementary features the team has implemented as part of the stack. We will also discuss in detail some of the use cases that are enabled by the PINS stack. \nDemonstration by ONF\nView Slides\nBrian O’Conner\, Daniele Moro\, Don Newton\, Niloofar Toorchi \nThe demonstration featured Weighted Cost MultiPath (WCMP) routing as a use case for PINS. \n 
URL:https://p4.org/event/ocp-global-summit-2021/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20211021T080000
DTEND;TZID=UTC:20211021T080000
DTSTAMP:20260417T062526
CREATED:20250912T220029Z
LAST-MODIFIED:20250915T231000Z
UID:10000103-1634803200-1634803200@p4.org
SUMMARY:Japan P4 User Group 2021
DESCRIPTION:The Japan P4 Users Association  is hosting this virtual event  annual event in Japan. Japanese integrators\, carriers\, service providers\, researchers\, and individuals will join the event to exchange information. The language for this event is Japanese. \nCheck out the event web page to view videos and slides from this event. \n  \nSponsors \nAPRESIA Systems\nIntel K.K.\nMacnica\, Inc. Altima Company\nNet One Systems Co.\, Ltd.\nToyota Motor Corporation
URL:https://p4.org/event/japan-p4-user-group-2021/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20210823T100000
DTEND;TZID=UTC:20210827T170000
DTSTAMP:20260417T062526
CREATED:20250912T220029Z
LAST-MODIFIED:20250915T231012Z
UID:10000101-1629712800-1630083600@p4.org
SUMMARY:ACM SIGCOMM 2021
DESCRIPTION:ONF projects are being highlighted in several of the ACM SIGCOMM 2021 sessions: \nAugust 23\, 2021 | 10:00am – 5:00pm EDT\nHackathon: P4 on Raspberry PI (P4Pi) \nP4PI enables designing and deploying P4-based network devices using the Raspberry Pi platform and is based on the T4P4S compiler. P4PI is developed as part of the P4 Education Workgroup activities. The team aims to provide both educators and practitioners the knowledge and tools required to use P4PI in class and at home\, including tutorials\, sample code\, tools and community support. \nCheck out the web page to learn more. Introductory videos can be accessed in a YouTube playlist. \nAugust 23\, 2021 | 1:40pm – 5:00pm EDT\nTutorial\, “5G Connected Edge Cloud” \n\nDescribe 5G\, breaking it down into components familiar to the SIGCOMM community.\nIntroduce the available open source software that implements these components.\nShow how these building blocks can be assembled into a Kubernetes-based edge cloud.\nIdentify and discuss the systems research opportunities such a platform enables.\n\nCheck out the web page to learn more. \nAugust 27\, 2021 | 1:00pm – 5:00pm EDT\nTutorial: Network-Accelerated Distributed Deep Learning \n\nAn introduction on scaling distributed machine learning from a networking-centric perspective. Includes a walk through of through of different solutions for accelerating network communication beginning with in-network aggregation\, describing SwitchML (a system for distributed machine learning that accelerates data-parallel training using P4 switches) as an example of co-design of programmable switch-based processing and end-host protocols.\nExamination of into properties of the traffic and exploit the sparsity of gradient values. A description of OmniReduce\, which evolves the concept of in-network aggregation and focuses on efficient collective operations for sparse data. We will close with lossy gradient compression techniques and the GRACE framework for implementing them.\n\nCheck out the web page to learn more.
URL:https://p4.org/event/acm-sigcomm-2021/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20210518T080000
DTEND;TZID=UTC:20210518T080000
DTSTAMP:20260417T062526
CREATED:20250912T220015Z
LAST-MODIFIED:20250915T231047Z
UID:10000099-1621324800-1621324800@p4.org
SUMMARY:2021 P4 Workshop
DESCRIPTION:The 2021 P4 Workshop was an exciting and informative virtual event that incorporated insights and perspectives from P4 community members around the world\, with focused segments on: \n\nP4 language\nP4 targets\nP4 use cases\nP4 demos\nP4 target tutorials\n\nIt included live keynotes as well as on-demand tech talks\, demos\, and tutorials – all the content is now available on-demand below. \n\n  \n\n\nLIVE KEYNOTES\n\n\n\n\nTitle & Speaker\nVideo\nSlides\n\n\n\n\n\nFROM PROGRAMMABLE SWITCHES TO PROGRAMMABLE NETWORKS\nNate Foster\, Associate Professor Computer Science\, Cornell University\n\n\n\n\n\nP4 AT INTEL\nGuido Appenzeller\, CTO\, Data Platforms Group\, Intel\n\n\n\n\n\nTHE VALUE OF P4 PROGRAMMABILITY AT THE NETWORK EDGE\nPrem Jain\, CEO & Co-Founder\, Pensando\n\n\n\n\n\nAPPROXIMATION IN PROGRAMMABLE DATA PLANE\nMinlan Yu\, Associate Professor\, Harvard University\n\n\n\n\n\nPINS P4 INTEGRATED NETWORK STACK\nMythil Raman\, Director Switch Infrastructure\, Google\nKonstantin Weitz\, Software Engineer\, Google\n\n\n\n\n\nSD-FABRIC PROGRAMMABLE FABRIC FOR DATACENTERS\nTimon Sloane\, VP Marketing & Ecosystem\, ONF\nCharles Chan\, MTS\, ONF\n\n\n\n\n\nPROGRAMMABLE NETWORKING – OUR JOURNEY\nYiqun Cai\, VP\, Alibaba\n\n\n\n\n\nPROGRAMMABILITY AND NETWORKING: WHY DO WE BOTHER?\nPere Monclus\, VP & CTO Network and Security\, VMware\n\n\n\n\n\nHIGHER-ORDER TELEMETRY IN THE DATA PLANE\nJennifer Rexford\, Gordon U.S. Wu Professor of Engineering\, Department Chair\, Princeton University\n\n\n\n\n\nP4: TWO SIDES OF THE SAME COIN\nAnja Feldmann\, Director\, Max-Planck\n\n\n\n\n\nDEEPLY PROGRAMMABLE 5G EDGE CLOUD FABRIC WITH P4\nOğuz Sunay\, VP R&D\, Mobility\, ONF\nCarmelo Cascone\, MTS\, ONF\n\n\n\n\n\n\nINVITED TALKS\n\n\n\n\nTitle & Speaker\nVideo\nSlides\n\n\n\n\n\nP4 PRACTICE AT BAIDU\nGang Cheng\, Distinguished Engineer\, Baidu\n\n\n\n\n\nPROGRAMMABLE DATA PLANES FOR CONVERGED ACCESS INFRASTRUCTURE\nMurali Venkat\, Principal Engineer\, Cisco\n\n\n\n\n\nPROGRAMMABILITY IN NICS FOR CONGESTION CONTROL AND TRANSPORT\nNandita Dukkipati\, Principal Engineer\, Google\nKonstantin Weitz\, Software Engineer\, Google\n\n\n\n\n\nNDP WITH SONIC-PINS: A LOW LATENCY AND HIGH PERFORMANCE DATACENTER TRANSPORT INTEGRATED INTO SONIC\nRong Pan\, Fellow\, Data Platform Group\, Intel\nReshma Sudarshan\, Director Applications Engineering\, Intel\n\n\n\n\n\n\nTECHNICAL TALKS\n\n\n\n\nTitle & Speaker\nVideo\nSlides\n\n\n\n\n\nTHE FOUR-DIMENSIONAL P4 SWITCHES – BASIC INTRODUCTION\nPaul Chang\, CTO\, Asterfusion\n\n\n\n\n\nEXTENDING P4 TO REALIZE A SCALABLE FLOW CACHING MECHANISM\nAngelo Tulumello\, Network Software Engineer\, Axbryd / University of Rome Tor Vergata\n\n\n\n\n\nMEASURING BROADBAND EXPERIENCE USING P4-PUSH TELEMETRY\nHimal Kumar\, CTO\, Canopus Networks\n\n\n\n\n\nP4-PROGRAMMABLE SMARTNIC CONTROLLED BY ONOS\nArtur Jaworski\, Software Developer\, CodiLime\nPawel Parol\, Senior Network Engineer\, CodiLime\n\n\n\n\n\nREVITALIZING INDUSTRIAL NETWORKING WITH PROGRAMMABLE DATA PLANES\nSándor Laki\, Assistant Professor\, ELTE Eötvös Loránd University\n\n\n\n\n\nP4PI: P4 ON RASPBERRY PI FOR NETWORKING EDUCATION\nSándor Laki\, Assistant Professor\, ELTE Eötvös Loránd University\n\n\n\n\n\nWHAT’S NEXT FOR P4? A JOURNEY AROUND MISSING FEATURES\nGergely Pongracz\, Expert of Programmable Networks\, Ericsson Research\n\n\n\n\n\nROUTER FOR ACADEMIA RESEARCH AND EDUCATION\nFrédéric Loui\, Technical Leader\, GÉANT\n\n\n\n\n\nCAN P4 RUN ON “SWITCHY” CPUS?\nCristian Dumitrescu\, Software Architect\, Intel\nHan Wang\, Software Architect\, Intel\n\n\n\n\n\nPORTABLE NIC ARCHITECTURE UPDATE\nAndy Fingerhut\, Principal Engineer\, Intel\n\n\n\n\n\nREALIZING ONE BIG SWITCH AS PERFORMANCE ABSTRACTION USING P4\nJeongkeun “JK” Lee\, Principal Engineer\, Intel\nPetr Lapukhov\, Network Engineer\, Facebook\n\n\n\n\n\nPACKET DEDUPLICATION IN P4\nStefan Johansson\, FPGA Architect\, Keysight Technologies\n\n\n\n\n\nCOMMON INTERMEDIATE REPRESENTATION (COMMON IR)\nVenkat Pullela\, Co-Founder\, OpenNets\n\n\n\n\n\nFLEXIBLE AND EFFICIENT MEMORY SYSTEM FOR A HIGH PERFORMANCE PROCESSING PIPELINE\nMario Baldi\, Distinguished Technologist\, Pensando\n\n\n\n\n\nQUADCOPTER IMPLEMENTATION OF AN IN-NETWORK CENTRALIZED COLLISION AVOIDANCE ALGORITHM IN PROGRAMMABLE DATA PLANES\nFabricio Rodriguez\, PhD Student\, UNICAMP\n\n\n\n\n\nPL2: TOWARDS PREDICTABLE LOW LATENCY IN RACK-SCALE NETWORKS\nYanfang Le\, PhD Student\, Intel & University of Wisconsin-Madison\n\n\n\n\n\n\nDEMONSTRATIONS\n\n\n\n\nTitle & Speaker\nVideo\nSlides\n\n\n\n\n\nWHEN SRV6 MEETS 5G CORE: IMPLEMENTATION & DEPLOYMENT OF A NETWORK SERVICE CHAINING FUNCTION IN SMARTNICS\nGuilherme Matos\, Masters Student\, Federal University of São Carlos\n\n\n\n\n\nGOODBYE SCAPY\, HELLO SNAPPI – DATAPLANE TESTING FROM DC TO DAYLIGHT USING OPEN TRAFFIC GENERATOR API\nChris Sommers\, Software Architect\, Keysight Technologies\nAnkur Sheth\, Director Engineering\, Keysight Technologies\n\n\n\n\n\n\nTUTORIALS\n\n\n\n\nTitle & Speaker\nVideo\nSlides\n\n\n\n\n\nP416 PROGRAMMING FOR INTEL TOFINO USING INTEL P4 STUDIO\nVladimir Gurevich\, Principal Engineer\, Barefoot\, Intel\nAndy Fingerhut\, Principal Engineer\, Intel\n\n\n\n\n\nP4-OVS TUTORIAL\nDan Daly\, Intel\nBrian O’Connor\, MTS\, ONF\nTomasz Osinski\, MTS\, ONF\nKossakowski Mateusz\, Orange\nNupur Jain\, Intel\nGerald Rogers\, Intel\nNamrata Limaye\, Software Engineer\, Intel\n\n\n\n\n\nNOVISPEAKER: COMMERCIALLY SUPPORTED P4 DEVELOPMENT & DEPLOYMENT TOOLSET FOR THE BAREFOOT/INTEL TOFINO\nArun Paneri\, Director Engineering\, NoviFlow\nJeff Elpern\, Director Product Management\, NoviFlow\n\n\n\n\n\n\nSPONSORS\n\n\n\n\n\n\n\n\n\n\nMore About Our Sponsors\n\n\n\n\nAPS Networks® is about more than just network disaggregation within switches or software-defined networking (SDN). We are using a blend of development skills in hardware\, firmware/embedded\, OS\, and application software\, to help open the world of closed networking. We are taking the pieces and putting them back together more securely\, efficiently\, and most importantly\, as part of an open\, collaborative community with our customers and partners. \nOur vision includes hardware\, open source\, and programmability\, all tailored to our customers’ business-specific requirements\, to provide a stable and supported platform for open networking innovation. Our dedicated hardware solutions are built around enabling the latest open technologies to serve vertical industry needs.\n \nAPS Networks ® BF2556X-1T\nAdvanced Programmable\nSwitch \n \nAPS Networks ® BF6064X-T\nAdvanced Programmable\nSwitch\n\n\n\n\n\n\n\nNoviFlow believes programmable pipeline processing will fundamentally change the way networking is done. This has led to the development of our NoviWare SDN NOS\, CyberMapper controller family\, and cybersecurity network solutions deployed around the world. \nWe also believe that healthy solution ecosystems are built using great development tools that flatten the learning curve\, reduce development effort and time\, and deliver a reliable deployment. \nNoviFlow’s NoviSpeaker P4 Runtime Speaker provides the P4 community with a commercially supported development and deployment toolset covering the complete development cycle and making full use of advanced P4 and Tofino capabilities on commercially available white-box hardware.\n\n\n\n\n\n\n\n\nVector Data builds Carrier-Grade NFV hardware infrastructure. Vector Data’s leading server\, network\, and storage solutions are deployed in SDN and Edge environments worldwide. All products are offered individually or as part of a complete OpenPod solution and are available with AC or -48V DC power as well as NEBS\, ETSI\, VCCI\, KC\, and other telecom compliance certifications. \nSome products\, such as Vault Edge servers\, are offered with additional options such as outdoor\, pole mount\, fully rugged\, HVDC\, and wide temperature. Vector Data is a new ONF member and looks forward to joining the community.
URL:https://p4.org/event/2021-p4-workshop/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20200912T080000
DTEND;TZID=UTC:20200912T170000
DTSTAMP:20260417T062526
CREATED:20250912T222203Z
LAST-MODIFIED:20250930T162210Z
UID:10000145-1599897600-1599930000@p4.org
SUMMARY:3rd P4 Workshop in Europe (EuroP4) 2020
DESCRIPTION:EuroP4 2020 is the third P4 Language Consortium event in Europe. It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world\, and to foster the growth of the P4 Community.
URL:https://p4.org/event/3rd-p4-workshop-in-europe-europ4-2020/
CATEGORIES:Events,Export
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20200428T080000
DTEND;TZID=UTC:20200429T080000
DTSTAMP:20260417T062526
CREATED:20250912T220241Z
LAST-MODIFIED:20250915T231056Z
UID:10000121-1588060800-1588147200@p4.org
SUMMARY:P4 Expert Roundtable Series
DESCRIPTION:The P4 Expert Roundtable Series was a virtual event that included keynotes\, plenary\, and panel discussions relevant to the P4 community. The video recordings and slides are now available for on-demand access below\, or view complete YouTube playlist. \n\n\n\n\n\n\nKeynotes\n\n\n\n \nP4 at the Edge \nNate Foster\, Associate Professor\, Computer Science\, Cornell University \nSlides \n\n \nUsing P4 & P4 Runtime for Optimal L3 Routing \nStefan Heule\, Software Engineer\, Google \nSlides \n\n\n\n \nFuture of Programmable Packet Processing \nChang Kim\, CTO Applications\, Barefoot Division\, Intel \nSlides \n\n \nP4 Evolution – From Packet Processing to Message Processing \nVipin Jain\, Founder & CTO\, Pensando \nSlides \n\n\n\n\n\nPlenary Sessions\n\n\n\nTitle\nSlides\nVideo\n\n\n\n\nHow is P4 Evolving as a Language \n\nModerator: Andy Fingerhut\, Cisco\nTomasz Osiński\, Orange\nEric Campbell\, Cornell University\n\n\nSlides\nVideo\n\n\nP4 Use Cases in Programmable Switching \n\nModerator: Prem Jonnalagadda\, Intel\nGuy Caspary\, Cisco\nPaola Grosso\, University of Amsterdam\nArkadiy Shapiro\, Intel\n\n\nSlides\nVideo\n\n\nP4 Use Cases in Operator Networks \n\nModerator: Brian O’Connor\, ONF\nSuresh Krishnan\, Kaloom\nVijay Sivaraman\, Canopus Networks\n\n\nSlides\nVideo\n\n\nP4 Use Cases in Programmable NICs \n\nModerator: Gordon Brebner\, Xilinx\nJohn Cruz\, Pensando\nMario Baldi\, Pensando\n\n\nSlides\nVideo\n\n\nClosing the Loop: Network Control in the Data Plane \n\nModerator: Jen Rexford\, Princeton University\nDaniel Alvarez\, Intel\n\n\nSlides\nVideo\n\n\n\n\nPlenary Sessions\n\n\n\nTitle\nSlides\nVideo\n\n\n\n\nProgrammable In-Network Security for Context-Aware BYOD Policies \n\nQiao Kang\, Rice University\nSrinivas Narayana Ganapathy\, Rutgers University\n\n\nSlides\nVideo\n\n\nEfficient P4+FPGA-based Forwarding for SCION\, a Path-Aware Internet Architecture \n\nKamila Součková\, ETH Zurich\nSteve Ibanez\, Stanford University\n\n\nSlides\nVideo\n\n\nPBT-on-Demand on Mellanox P4-Capable Hybrid Switch \n\nItzik Ashkenazi\, Technion – Israel Institute of Technology\nMatty Kadosh\, Mellanox Technologies\nMuhammad Shahbaz\, Stanford University\n\n\nSlides\nVideo\n\n\nRealizing Source Routed Multicast Using Mellanox’s Programmable Hardware Switches \n\nYonatan Piasetzky\, Mellanox Technologies\nMuhammad Shahbaz\, Stanford University\nPraveen Tammana\, Princeton University\n\n\nSlides\nVideo\n\n\nNetWarden: Mitigating Network Covert Channels While Preserving Performance \n\nJiarong Xing\, Rice University\nAlan Liu\, Carnegie Mellon & Boston University\n\n\nSlides\nVideo\n\n\nA Journey from OpenFlow to P4: Improved Performance and Reduced Development Time \n\nJeff Elpern\, NoviFlow\nMihai Budiu\, VMware Research\n\n\nSlides\nVideo\n\n\nFlowPulse: Traffic Classification Using P4 and ML \n\nHimal Kumar\, Canopus Networks\nVijay Sivaraman\, Canopus Networks\nBrian O’Connor\, ONF\nPrem Jonnalagadda\, Intel\n\n\nSlides\nVideo\n\n\nMathematical Operations in Programmable Switches Using TCAMs \n\nMojtaba Malekpourshahraki\, University of Illinois at Chicago\nBrent Stephens\, University of Illinois at Chicago\nSrinivas Narayana Ganapathy\, Rutgers University\n\n\nSlides\nVideo\n\n\nTowards an Open P4 Programmable Hardware Platform \n\nGordon Brebner\, Xilinx\nStephen Ibanez\, Stanford University\n\n\nSlides\nVideo\n\n\nProgrammable Data Plane Architecture for the Network Edge \n\nMario Baldi\, Pensando Systems\nMina Tahmasbi Arashloo\, Cornell University\n\n\nSlides\nVideo\n\n\nBuilding and Delivering a P4-based Network Tester \n\nRam Murthy\, Keysight Technologies\nPraveen Tammana\, Princeton University\n\n\nSlides\nVideo\n\n\nOffloading Media Traffic to Programmable Data Plane Switches \n\nElie Kfoury\, University of South Carolina\nMina Tahmasbi Arashloo\, Cornell University\n\n\nSlides\nVideo\n\n\nAdvanced Congestion Control with Programmable Switches \n\nJeongkeun “JK” Lee\, Barefoot Division at Intel\nMuhammad Shahbaz\, Stanford University\n\n\nSlides\nVideo\n\n\n\n\nSponsors
URL:https://p4.org/event/p4-expert-roundtable-series/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20191018T090000
DTEND;TZID=UTC:20191018T180000
DTSTAMP:20260417T062526
CREATED:20250912T220015Z
LAST-MODIFIED:20250915T231117Z
UID:10000098-1571389200-1571421600@p4.org
SUMMARY:P4 Hackathon in Amsterdam
DESCRIPTION:An event organized by the P4 Education Working Group\nHeld in Amsterdam\, The Netherlands on October 18th\, 2019\nThe P4 Hackathon aims to develop novel\, proof-of-concept data plane applications\, and to support the open-source community through the development of tools and infrastructure. \nThe hackathon is intended for P4 users of all levels – from beginners to experts. We are keen to meet new people\, see new faces\, and create new collaborations between (and within) academia and industry! \nVenue\nKPN Teleportboulevard 121 1043 EJ Amsterdam Netherlands \nAgenda\n\n\n9:00 – 9:15\n\nRegistration\nCoffee & Light Snacks\n\n\n\n\n\n9:15 – 9:30\n\nWelcome and Introductions\n\n\n9:30 – 13:00\n\nP4 introductory course for beginners\nBreak into interest groups and hack!\n\n\n\n\n\n13:00 – 14:00\n\nLunch!\n\n\n\n\n\n14:00 – 14:15\n\nProgress discussion & QA session\n\n\n\n\n\n14:15 – 17:45\n\nFurther P4/P4Runtime tutorials\nMore hacking\n\n\n\n\n\n17:55 – 18:00\n\nClosing\n\n\n\n\nDiversity and inclusivity\nThe P4 hackathon aims to increase the diversity and inclusivity of the P4 community. Everyone should feel welcome taking part in the event\, and we will enforce a strict no-harrasement code of conduct. \nPlease contact aaron@aagico.berlin if you are unable to attend because of travel or accomodation costs \nOrganization\n\nAaron A. Glenn\, AAGlenn Internetworking Company\nNoa Zilberman (chair)\, University of Cambridge (P4 Education Working Group)\nRobert Soulé (chair)\, Yale University (P4 Education Working Group)\n\nSpecial Thanks to our Sponsors:\n               \nThank you to KPN for providing the event location and sponsoring food & drink in full.
URL:https://p4.org/event/p4-hackathon-in-amsterdam/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190923T083000
DTEND;TZID=UTC:20190923T180000
DTSTAMP:20260417T062526
CREATED:20250912T215908Z
LAST-MODIFIED:20250915T231139Z
UID:10000089-1569227400-1569261600@p4.org
SUMMARY:2nd P4 Workshop in Europe (EuroP4)
DESCRIPTION:A presentation by the P4 Language Consortium and ONF in conjunction with ANCS 2019\nHeld at Cambridge\, UK on September 23\, 2019\nEuroP4 2019 is the second P4 Language Consortium event in Europe.\nIt aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world\, and to foster the growth of the P4 Community. \nTopics of an interest include\, but are not limited to: \n\nAll aspects of P4-based network protocol research including design\, specification\, verification\, implementation\, measurement\, testing\, and analysis.\nContributions to network architecture using P4\, e.g.\, specific algorithms and protocols for network virtualization or future Internet architectures.\nNew applications and in-network computing enabled by P4\nP4-based and P4-NetFPGA based programmable data planes\nEnd-host networking with P4\nTools and frameworks for development using P4\nPerformance analysis and measurement of P4-based designs and systems\nContributions to the evolution of the P4 language\n\nVenue\nUniversity of Cambridge\nDepartment of Computer Science and Technology\nThe Computer Laboratory\nWilliam Gates Building\n15 JJ Thomson Avenue\, Cambridge CB3 0FD \nAgenda\n\n\n8:30 – 9:15am\n\nRegistration and Breakfast\n\n\n\n\n\n9:15 – 9:30\n\nWelcome and Introductions\n\n\n\n\n\n9:30 – 10:30\n\nKeynote: Undefined behaviours in P4 progams: find them\, fix them or exploit them. (Slides) Speaker: Professor Costin Raiciu (University Politehnica of Bucharest)\n\n Abstract\n\n\n Biography\n\n\n\n\n\n\n\n10:30 – 11:00\n\nCoffee break\n\n\n\n\n\n11:00 – 12:15\n\nOffloading data plane functions to the multi-tenant Cloud Infrastructure using P4. (Paper) (Slides)\nTomasz Osinski (Orange Labs & Warsaw University of Technology)\, Mateusz Kossakowski (Orange Labs & Warsaw University of Technology)\, Halina Tarasiuk (Warsaw University of Technology)\, Roland Picard (Orange Labs)\nP4DNS: In-Network DNS. (Paper) (Slides)\nJackson Woodruff (University of Cambridge)\, Murali Ramanujam (University of Cambridge)\, Noa Zilberman (University of Cambridge)\nCryptographic Hashing in P4 Data Planes. (Paper) (Slides)\nDominik Scholz (Technical University of Munich)\, Andreas Oeldemann (Technical University of Munich)\, Fabien Geyer (Technical University of Munich)\, Sebastian Gallenmüller (Technical University of Munich)\, Henning Stubbe (Technical University of Munich)\, Thomas Wild (Technical University of Munich)\, Andreas Herkersdorf (Technical University of Munich)\, Georg Carle (Technical University of Munich)\n\n\n\n\n\n12:15 – 13:45\n\nLunch break\n\n\n\n\n\n13:45 – 15:00\n\ndaPIPE – A Data Plane Incremental Programming Environment. (Paper) (Slides)\nMario Baldi (Politecnico di Torino)\nRandom Linear Network Coding on Programmable Switches. (Paper) (Slides)\nDiogo Gonçalves (University of Lisbon)\, Salvatore Signorello (University of Lisbon)\, Fernando M.V. Ramos (University of Lisbon)\, Muriel Medard (MIT)\nTowards Understanding the Performance of P4 Programmable Hardware. (Paper) (Slides)\nHasanin Harkous (Technical University of Munich/ Nokia Bell Labs)\, Michael Jarschel (Nokia Bell Labs)\, Mu He (Technical University of Munich)\, Rastin Pries (Nokia Bell Labs)\, Wolfgang Kellerer (Technical University of Munich)\n\n\n\n\n\n15:00 – 15:15\n\nPosters and Demos introduction and pitch\n\n\n\n\n\n15:15 – 16:15\n\nCoffee break with Posters and Demos\n\n\n\n\n\n16:15 – 17:15 (No Proceedings Track)\n\nTowards Neural Network Inference on Programmable Switches. Jonatan Langlet (Karlstad University)\, Andreas Kassler (Karlstad University)\, Deval Bhamare (Karlstad University)\nIn-Network Traffic Redundancy Elimination over Programmable Data Plane. Hongrok Choi (Korea University)\, Seokwon Jang (Korea University)\, Sangheon Pack (Korea University)\nEstimation of logarithmic and exponential functions entirely in P4-programmable data planes. Damu Ding (FBK CREATE-NET research center)\, Marco Savi (FBK CREATE-NET research center)\, Domenico Siracusa (FBK CREATE-NET research center)\nResource-Efficient Service Function Chaining in Programmable Data Plane. Hochan Lee (Korea University)\, Jaewook Lee (Korea University)\, Haneul Ko (Korea University)\, Sangheon Pack (Korea University)\nHow NRENs can benefit from P4. Mauro Campanella (GARR)\, Pavel Benacek (CESNET)\, Ivana Golub (PSNC)\, Xavier Jeannin (RENATER)\, Damian Parniewicz (PSNC)\, Marco Savi (FBK)\, Frederic Loui (RENATER)\n\n\n\n\n\n17:15 – 17:30\n\nClosing\n\n\n\n\n\n18:00 onwards\n\nSocial Event This event will be held in conjuction with the IEEE ANCS reception.\n\n\n\nAccepted Posters\n\nP4MT: Multi-Tenant Support Prototype for International P4 Testbed. Jim Hao Chen (iCAIR/Northwestern University)\, Buck Chung (National Chiao Tung University)\, Chien-Chao Tseng (National Chiao Tung University)\, Joe Mambretti (iCAIR/Northwestern University)\nSketch-based Entropy Estimation for Network Traffic Analysis using Programmable Data Plane ASICs. Yu-Kuen Lai (Chung-Yuan Christian University)\, Ku-Yeh Shih (Chung-Yuan Christian University)\, Po-Yu Huang (Chung-Yuan Christian University)\, Ho-Ping Lee (Chung-Yuan Christian University)\, Yu-Jau Lin (Chung-Yuan Christian University)\, Te-Lung Liu (Narlabs)\, Jim Chen (Northwestern University)\nGraph-to-P4: A P4 boilerplate code generator for parse graphs. Eder Ollora Zaballa (Technical University of Denmark)\, Zifan Zhou (Technical University of Denmark)\nAsynchronous Extern Functions in Programmable Software Data Planes. Daniel Horpacsi (ELTE Eötvös Loránd University\, Budapest\, Hungary)\, Sandor Laki (ELTE Eötvös Loránd University\, Budapest\, Hungary)\, Peter Voros (ELTE Eötvös Loránd University\, Budapest\, Hungary)\, Mate Tejfel (ELTE Eötvös Loránd University\, Budapest\, Hungary)\, Gergely Pongracz (Ericsson Research)\, Laszlo Molnar (Ericsson Research)\n\nAccepted Demos\n\nP4-NetFPGA-based network slicing solution for 5G MEC architectures. Ruben Ricart-Sanchez (University of the West of Scotland)\, Pedro Malagon (Universidad Politecnica de Madrid)\, Jose M. Alcaraz-Calero (University of the West of Scotland)\, Qi Wang (University of the West of Scotland)\nUsing P4 on Fixed-Pipeline and Programmable Stratum Switches. Brian O’Connor (ONF)\, Yi Tseng (ONF)\, Maximilian Pudelko (ONF)\, Alireza Ghaffarkhah (Google)\, Devjit Gopalpur (Google)\nHow to measure the speed of light with programmable data plane hardware?. Ralf Kundel (TU Darmstadt)\, Fridolin Siegmund (TU Darmstadt)\, Boris Koldehofe (TU Darmstadt)\n\nGeneral Chairs\n\nNoa Zilberman\, University of Cambridge\nRobert Soulé\, Yale University\n\nProgram Chairs\n\nGianni Antichi\, Queen Mary University of London\nFernando Ramos\, University of Lisbon\n\nWeb Chair\n\nSalvatore Signorello\, University of Lisbon\n\nTechnical Program Committee\n\nGordon Brebner\, Xilinx\nPaolo Costa\, Microsoft Research\nJon Crowcroft\, University of Cambridge\nBen Pfaff\, VMware\nGeorgios Nikolaidis\, Barefoot Networks\nMarco Chiesa\, KTH\nGabor Retvari\, University of Budapest\nRoberto Bifulco\, NEC\nRan Ben Basat\, Harvard University\nAndreas Kassler\, Karlstads University\nMario Baldi\, Politecnico di Torino\nChristian Rothenberg\, University of Campinas\nMuhammad Shahbaz\, Stanford University\nAurojit Panda\, New York University\nMarcin Wojicik\, University of Cambridge\n\nSpecial Thanks to our Sponsors:\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n  \n \n 
URL:https://p4.org/event/2nd-p4-workshop-in-europe-europ4/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190823T083000
DTEND;TZID=UTC:20190823T170000
DTSTAMP:20260417T062526
CREATED:20250912T215908Z
LAST-MODIFIED:20250915T231159Z
UID:10000090-1566549000-1566579600@p4.org
SUMMARY:ACM SIGCOMM 2019 Full-Day Tutorial on Programming the Network Data Plane
DESCRIPTION:Held at Shangri-La Hotel Beijing on Friday\, August 23\, 2019\nExpectations\nAttendees will be expected to have basic familiarity with the P4 lanaguage. Novice participants without any prior P4 experience are encouraged to refer to the Getting Started wiki page. \nAttendees will also be expected to bring their own laptops. We will provide a VM image containing all the necessary packages and tools. The P4 specification is publicly available at the P4 website under an Apache license. Key development tools (front-end compiler and software switch capable of running P4 programs) are available as open-source tools (http://github.com/p4lang). \nInstructions\nIn order to ensure that you arrive prepared for the tutorial we ask that you please follow the instructions listed on our GitHub repository. \nIf you attend and complete the P4 tutorial and you would like to receive a certificate of completion from P4.org\, please send an email to sibanez@stanford.edu indicating your request. \nAgenda\n\n\n8:30am – 9:30am\n\nP4 Language Overview\n\n\n\n\n\n9:30am – 10:00am\n\nCollaborative Lab Exercises – Part I\n\n\n\n\n\n10:00am – 10:30am\n\nTea/Coffee Break\n\n\n\n\n\n10:30 – 12:00pm\n\nCollaborative Lab Exercises – Part II\n\n\n\n\n\n12:00pm – 1:30pm\n\nLunch\n\n\n\n\n\n1:30pm – 3:00pm\n\nMini Research Workshop – Part I\n\nLeveraging P4 to Automatically Validate Networking Switches. Stefan Heule\, Konstantin Weitz\, Waqar Mohsin\, Lorenzo Vicisano\, Amin Vahdat (Google).\nMimic P4 Model. Le Tian (Information Engineering University)\, Pengshuai Cui (PLA Strategic Support Force Information Engineering University)\, Yuxiang Hu (PLA Strategic Support Force Information Engineering University)\nTaurus: An Intelligent Data Plane. Tushar Swamy\, Alexander Rucker\, Muhammad Shahbaz\, and Kunle Olukotun (Stanford University)\n100Gbps P4-enabled Smart NIC: Architecture and Challenges on Datapath implementation in FPGA. Yan Yan (Raymax Technology)\n\n\n\n\n\n\n\n3:00pm – 3:30pm\n\nBreak\n\n\n\n\n\n3:30pm – 5:00pm\n\nMini Research Workshop – Part II\n\nNon-invasive Campus Deployment of P4-based Network Measurement. Xiaoqi Chen (Princeton University)\nPerformant and Flexible DDoS Defense with Programmable Switches. Zaoxing Liu (Carnegie Mellon University)\, Georgios Nikolaidis (Barefoot Networks)\, Jeongkeun Lee (Barefoot Networks)\, Changhoon Kim (Barefoot Networks)\, Xin Jin (Johns Hopkins University)\, Minlan Yu (Harvard University)\, Vyas Sekar (Carnegie Mellon University)\nMagellan: A Compiler and Runtime for High-Level Programming of Highly Programmable Network Data Planes. Y. Richard Yang (Yale University)\nRedesigning Sketch Data Structures for Programmable Data Plane Devices. Vladimir Braverman (Johns Hopkins University)\n\n\n\n\n\nOrganizers\n\nStephen Ibanez (Stanford University)\nChanghoon Kim (Barefoot Networks)
URL:https://p4.org/event/acm-sigcomm-2019-full-day-tutorial-on-programming-the-network-data-plane/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190720T080000
DTEND;TZID=UTC:20190721T080000
DTSTAMP:20260417T062526
CREATED:20250912T215848Z
LAST-MODIFIED:20250915T231208Z
UID:10000082-1563609600-1563696000@p4.org
SUMMARY:P4 Hackathon at IETF105
DESCRIPTION:P4 Hackathon at IETF 105 in Montreal on July 20-21\, 2019.\nThe Computing in the Network (COIN) IRTF research group will host a P4 Hackathon at IETF 105 in Montreal on July 20 and 21. The goal of the hackathon is to give the COIN community a way to investigate new applications in P4 and develop prototypes of potential new applications. As of now\, a lot of P4 development has focused on data centers\, but we would like the hackathon to address the DC-edge programming spectrum. \nTopics of interest include industrial applications for fault detection\, data filtering in streaming media\, autonomous devices at the edge and distributed networking. Participants will be provided with all the tools necessary to create their application. \nFor more information about COIN\, subscribe to their mailing list or visit their wiki.
URL:https://p4.org/event/p4-hackathon-at-ietf105/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190501T080000
DTEND;TZID=UTC:20190501T183000
DTSTAMP:20260417T062526
CREATED:20250912T215848Z
LAST-MODIFIED:20250915T231259Z
UID:10000083-1556697600-1556735400@p4.org
SUMMARY:P4 Workshop 2019
DESCRIPTION:A Presentation by the P4 Language Consortium\nHeld at Stanford University on Wednesday\, May 1\, 2019\nSpecial Thanks to our Sponsors:\n      \n  \nVenue\n    Address: Arrillaga Alumni Center\, 326 Galvez St\, Stanford\, CA 94305\n    Directions below:\n\nAgenda\n\n\n8:00 – 9:00am\n\nRegistration and Breakfast\n\n\n\n\n\n9:00 – 9:20am\n\nWelcome and Introductions (Slides) (Video)Speakers: Nick McKeown (Stanford University)\, Nate Foster (Cornell University)\, Guru Parulkar (Open Networking Foundation)\n\n\n\n\nSESSION CHAIR: Calin Cascaval (Barefoot Networks) \n\n\n9:20 – 9:40am\n\nLeveraging P4 for Fixed Function Switches (Abstract) (Slides) (Video)Speakers: Konstantin Weitz & Stefan Heule (Google)Co-authors: Konstantin Weitz\, Stefan Heule\, Waqar Mohsin\, Lorenzo Vicisano\, Amin Vahdat (Google)\n\n\n\n\n\n9:40 – 10:00am\n\nBuilding a Network Appliance using P4 and Tofino (Slides) (Video)Speaker and Author: Simon Capper (Arista)\n\n\n\n\n\n10:00 – 10:20am\n\nPegasus: Load-Aware Selective Replication with an In-Network Coherence Directory (Abstract) (Slides) (Video)Speaker: Jialin Li (University of Washington)Co-authors: Authors: Jialin Li (University of Washington); Jacob Nelson (Microsoft Research); Xin Jin (Johns Hopkins University); Dan R. K. Ports (Microsoft Research)\n\n\n\n\n\n10:20 – 10:35am\n\nDemo Lightning Talks (1-2 min per demo\, ~5 demos) (Video)\n\n\n\n\n\n10:35 – 11:05am\n\nBreak and Demo Visits\n\n\n\n\nSESSION CHAIR: Mihai Budiu (VMware Research) \n\n\n11:05 – 11:25am\n\nEvent-Driven Packet Processing (Abstract) (Slides) (Video)Speaker: Stephen Ibanez (Stanford University)Co-authors: Stephen Ibanez (Stanford University); Gordon Brebner (Xilinx Labs); Gianni Antichi (Queen Mary University of London); Nick McKeown (Stanford University)\n\n\n\n\n\n11:25 – 11:45am\n\nEnabling Memory-intensive Network Functions on Programmable Switches (Abstract) (Slides) (Video)Speaker: Daehyeok Kim (Carnegie Mellon University)Co-authors: Daehyeok Kim\, Zaoxing Liu (Carnegie Mellon University); Yibo Zhu (Bytedance); Changhoon Kim\, Jeongkeun Lee\, Antonin Bas (Barefoot Networks); Vyas Sekar\, Srini Seshan (Carnegie Mellon University)\n\n\n\n\n\n11:45 – 12:05pm\n\nSwitchML: Scaling Distributed Machine Learning with In-Network Aggregation (Slides) (Video)Speaker: Jacob Nelson (Microsoft Research)Co-authors: Amedeo Sapio\, Marco Canini\, Chen-Yu Ho (KAUST); Jacob Nelson (Microsoft Research); Panos Kalnis (KAUST); Changhoon Kim (Barefoot Networks); Arvind Krishnamurthy (University of Washington); Masoud Moshref (Barefoot Networks); Dan R. K. Ports (Microsoft Research); Peter Richtàrik (KAUST)\n\n\n\n\n\n12:05 – 12:25pm\n\nTaurus: An Intelligent Data Plane (Abstract) (Slides) (Video)Speaker: Tushar Swamy (Stanford University)Co-authors: Tushar Swamy\, Alexander Rucker\, Muhammad Shahbaz\, Neeraja Yadwadkar\, Yaqi Zhang\, Kunle Olukotun (Stanford University)\n\n\n\n\n\n12:25 – 12:40pm\n\nDemo Lightning Talks (1-2 min per demo\, ~5 demos) (Video)\n\n\n\n\n\n12:40 – 2:05pm\n\nLunch and Demo Visits\n\n\n\n\nSESSION CHAIR: Nick McKeown (Stanford University) \n\n\n2:05 – 3:20pm\n\nKEYNOTE: The End of Moore’s Law and Faster General Purpose Processors\, and a New Road Forward (Slides) (Video)Speaker and Author: John Hennessy (Stanford University)Abstract: After 40 years of remarkable progress in general-purpose processors\, a variety of factors are combining to lead to a much slower rate of performance growth in the future. These limitations arise from three different areas: IC technology\, architectural inefficiencies\, and changing applications and usage. The end of Dennard scaling and the slowdown in Moore’s Law will require much more efficient architectural approaches than we have relied on. Although progress on general-purpose processors may hit an asymptote\, domain specific architectures may be the one attractive path for important classes of problems\, at least until we invent a flexible and competitive replacement for silicon.\n\n\n\n\n\n3:20 – 3:50pm\n\nBreak and Demo Visits\n\n\n\n\nSESSION CHAIR: Gordon Brebner (Xilinx) \n\n\n3:50 – 4:10pm\n\nUsing Programmable Chip and Open Source Software to disaggregate Network Packet Broker (NPB) and 5G UPF (Abstract) (Slides) (Video)Speaker: Chris Sueng-Y. Park (KulCloud)Co-authors: Junho Suh (SK Telecom); SuengYong Park (KulCloud)\n\n\n\n\n\n4:10 – 4:40pm\n\nTrustworthy Data Plane Programming (Video)Speaker and Author: Nate Foster (Cornell University)\n\n\n\n\n\n4:40 – 5:00pm\n\nThe Switching System Vendor Viewpoint: Opportunities and Challenges (Abstract) (Slides) (Video)Speaker and Author: Mario Baldi (Cisco Systems)\n\n\n\n\n\n5:00 – 5:15pm\n\nClosing Remarks (Video)\n\n\n\n\n\n5:15 – 6:30pm\n\nReception\n\n\n\n\nDemos to Visit\n\nSRv6 Mobile User Plane\, POC and Open Source Implementation (Toyota Motor Corporation\, SoftBank\, APRESIA Systems\, Ltd.) (abstract)\ndaPIPE:DAta Plane Incremental Programming Environment (Cisco Systems\, Politecnico di Torino) (abstract)\nImproving Gossip Protocols with P4 (Cornell University)\nSampling on Demand using P4 Programmable Switch in Hybrid Mode (Technion University\, Mellanox Technologies)\nFast String Searching on PISA (Università della Svizzera italiana\, Barefoot Networks) (abstract)\nOptimizing Memory Resource Allocation of P4 Match Action Tables (CESNET\, Netcope Technologies)\nT4P4S & PIE: Towards an AQM Evaluation Testbed with P4 and DPDK (Eötvös Loránd University) (abstract)\ngRPC\, P4 Runtime and Zero-Touch-Provisioning Deployment in Programmable Forwarding Planes (Noviflow)\nP4 Insight: P4 visualization (Barefoot Networks)\nP4-16 IPv6 Implementation of Cisco ACI Data Plane (MNK Consulting) (abstract)\nImplementing the P4 Portable Switch Architecture (PSA) (Cornell University)\nEvent-Driven Packet Processing using P4->NetFPGA (Stanford University\, Xilinx Labs) (abstract)\n\nTechnical Program Committee\n\nNate Foster (Chair)\, Cornell University\nNick McKeown (Chair)\, Stanford University\nAnirudh Sivaraman\, New York University\nGordon Brebner\, Xilinx\nHongqiang Liu\, Alibaba\nMihai Budiu\, VMware\nMina Tahmasbi Arashloo\, Princeton University\nSandesh Kumar Sodhi\, Juniper Networks
URL:https://p4.org/event/p4-workshop-2019/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190430T080000
DTEND;TZID=UTC:20190430T080000
DTSTAMP:20260417T062526
CREATED:20250912T215853Z
LAST-MODIFIED:20250915T231307Z
UID:10000084-1556611200-1556611200@p4.org
SUMMARY:P4 Developer Day 2019
DESCRIPTION:A Presentation by the P4 Language Consortium\nHeld at Stanford University on Tuesday\, April 30\, 2019\nSpecial Thanks to our Sponsors:\n  \nVenue\nAddress: Arrillaga Alumni Center\, 326 Galvez St\, Stanford\, CA 94305\nDirections:\n  \nDeveloper Day Tracks\nNew for this year\, we are offering two tracks for the developer day: a beginner track and an advanced track. Both tracks will be delivered by experienced instructors and using a software platform that will be made available shortly before the Developer Day itself. \n  \nBeginner Track\nThis track is for developers who are new to P4 and want a tutorial-style introduction to the languages main features. It is organized around a series of programming exercises in which participants implement conventional and novel solutions to various problems in networking including: \n\nBasic forwarding\, tunneling\, and source routing\nLoad balancing\nMonitoring and telemetry\nP4Runtime\n\nOnly basic programming knowledge is required\, but familiarity with Python and using a Linux virtual machines will be helpful. \n\nVirtual Machine\nWe have created a VM with everything needed to work on the tutorial exercises\, including the P4 Compiler\, Behavioral Model\, starter code\, and editors. We suggest downloading the VM and executing the instructions below ahead of the tutorial. \nUse the following link to download the VM image (5.2 GB). \n\nImport and Run the VM\nThe VM is in .ova format and has been created using VirtualBox. To run the VM you can use any modern virtualization system\, although we recommend using VirtualBox. For instructions on how to get VirtualBox and import the VM\, use the following links: \nVirtualBox Download \nImporting a VM \nLogin Credentials (To access the Ubuntu system in the VM\, use the following credentials with sudo privileges): \n\nUser: p4\nPassword: p4\n\n\nSystem Requirements\nThe current configuration of the VM is 2 GB of RAM and 2 CPUs. These are the recommended minimum system requirements to complete the exercises. When imported\, the VM takes approximately 8 GB of disk space. For the best experience\, we recommend running the VM on a host system that has at least twice as many resources. \n\nAgenda\n  \n\nAdvanced Track\nThis track is for developers with intermediate knowledge of the P4 language. It is organized around a sequence of hands-on exercises that show how to build a leaf-spine data center fabric based on Segment Routing over IPv6 (SRv6)\, using the ONOS SDN controller: \n\nBasic forwarding\nBridging\nSRv6\nONOS Control Plane\nTesting in Mininet\n\nOnly basic knowledge of Java is required. The track will include a brief introduction to ONOS for beginners. Participants will be provided with a skeleton implementation of the applicationq to complete\, filling in the relevant parts to generate run-time table entries and other entities to implement bridging and SRv6 capabilities. \n\nVirtual Machine\nWe have created a VM with everything needed to work on the tutorial exercises\, including ONOS\, stratum_bmv2\, Mininet\, P4Runtime\, PTF\, and code editors. We suggest downloading the VM and executing the instructions below ahead of the tutorial. \nUse the following link to download the VM (5.3 GB). Please also make note of the backup link. \n\n1.) Import and Run the VM\nThe VM is in .ova format and has been created using VirtualBox v6.0.6. To run the VM you can use any modern virtualization system\, although we recommend using VirtualBox. For instructions on how to get VirtualBox and import the VM\, use the following links: \nVirtualBox Download \nImporting a VM \nLogin Credentials (To access the Ubuntu system in the VM\, use the following credentials with sudo privileges): \n\nUser: sdn\nPassword: rocks\n\n\n* System Requirements\nThe current configuration of the VM is 4 GB of RAM and 4 core CPU. These are the recommended minimum system requirements to complete the exercises. When imported\, the VM takes approx. 8 GB of HDD space. For a flawless experience\, we recommend running the VM on a host system that has at least the double of resources. \n\n2.) Generate SSH Keys\nONOS uses SSH key-based authentication to access its command line interface (CLI). Before using ONOS\, you need to generate public/private rsa key pair using the following command inside the VM: \nCommand: ssh-keygen -t rsa -f ~/.ssh/id_rsa -P ‘’ -q \n\nAgenda\n  \nInstructors\n\nNate Foster (Cornell University)\nBrian O’Connor (Open Networking Foundation)\nCarmelo Cascone (Open Networking Foundation)\nAnd others (TBA)
URL:https://p4.org/event/p4-developer-day-2019/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190329T090000
DTEND;TZID=UTC:20190329T180000
DTSTAMP:20260417T062526
CREATED:20250912T215853Z
LAST-MODIFIED:20250915T231319Z
UID:10000085-1553850000-1553882400@p4.org
SUMMARY:P4 Hackathon in Frankfurt
DESCRIPTION:An event organized by the P4 Education Working Group\nHeld in Frankfurt\, Germany on March 29\, 2019\nThe P4 Hackathon aims to develop novel\, proof-of-concept data plane applications\, and to support the open-source community through the development of tools and infrastructure. \nThe hackathon is intended for P4 users of all levels – from beginners to experts. \nWe are keen to meet new people\, see new faces\, and create new collaborations between (and within) academia and industry! \nVenue\nEASTSIDE Otto-Messmer-Strasse 1 60314 Frankfurt am Main Deutschland \nThe event facility is managed by Co-Work & Play GmbH \nRegistration\nPlease note that registration is closed. Please contact aaron@aagico.berlin with any questions or concerns. \nAgenda\n\n\n9:00 – 10:00am\n\nRegistration\n\n\n\n\n\n9:30 – 10:00\n\nWelcome and Introductions\n\n\n10:00 – 13:00\n\nP4 introductory course for beginners\nBreak into interest groups and hack!\n\n\n\n\n\n13:00 – 14:00\n\nLunch!\n\n\n\n\n\n14:00 – 14:15\n\nProgress discussion & QA session\n\n\n\n\n\n14:15 – 17:45\n\nFurther P4/P4Runtime tutorials\nMore hacking\n\n\n\n\n\n17:55 – 18:00\n\nClosing\n\n\n\n\nDiversity and inclusivity\nThe P4 hackathon aims to increase the diversity and inclusivity of the P4 community. Everyone should feel welcome taking part in the event\, and we will enforce a strict no-harrasement code of conduct. \nPlease contact aaron@aagico.berlin if you are unable to attend because of travel or accomodation costs \nOrganization\n\nNoa Zilberman (chair)\, University of Cambridge (P4 Education Working Group)\nRobert Soulé (chair)\, Università della Svizzera italiana (P4 Education Working Group)\nAaron A. Glenn\, AAGlenn Internetworking Company\n\nSpecial Thanks to our Sponsors:\n                  \n  \nThank you to DE-CIX for sponsoring the event location in full.
URL:https://p4.org/event/p4-hackathon-in-frankfurt/
CATEGORIES:Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=UTC:20190301T080000
DTEND;TZID=UTC:20190301T180000
DTSTAMP:20260417T062526
CREATED:20250912T215854Z
LAST-MODIFIED:20250915T231335Z
UID:10000086-1551427200-1551463200@p4.org
SUMMARY:P4 Hackathon at NSDI
DESCRIPTION:An event organized by the P4 Education Working Group and the Cornell-Princeton Network Programming Initiative\, in conjunction with NSDI 2019\nHeld in Boston\, MA\, USA on March 1\, 2019\nThe P4 Hackathon aims to develop novel\, proof-of-concept data plane applications\, and to support the open-source community through the development of tools and infrastructure. \nThe hackathon is intended for P4 users of all levels – from beginners to experts. \nWe are keen to meet new people\, see new faces\, and create new collaborations between (and within) academia and industry! \nVenue\nSheraton Boston 39 Dalton St Boston\, MA 02199 USA Public Garden Room \nThe event is co-located with NSDI 2019. \nRegistration\nClick here to register. \nPlease note that there are a limited number of spaces. \nAgenda\nThis agenda is tentative\, please check closer to the date! \n\n\n8:00 – 10:00am\n\nRegistration\n\n\n\n\n\n8:30 – 10:00am\n\nP4 crash course for beginners\n\n\n\n\n\n10:00 – 10:15\n\nWelcome and Introductions\, finding common interests to work on\n\n\n\n\n\n10:15 – 17:25\n\nBreaking into groups\, hack!\n\n\n\n\n\n17:25 – 17:55\n\nProject presentations\n\n\n\n\n\n17:55 – 18:00\n\nClosing\n\n\n\n\nDiversity and inclusivity\nThe P4 hackathon aims to increase the diversity and inclusivity of the P4 community. Everyone should feel welcome taking part in the event\, and we will enforce a strict no-harrasement code of conduct. \nParticipants who are attending NSDI 2019\, can apply for NSDI’s student and diversity travel grants. P4 specific information is coming soon! \nOrganization\n\nNoa Zilberman (chair)\, University of Cambridge\nRobert Soulé (chair)\, Università della Svizzera italiana\nNate Foster\, Cornell University\nJennifer Rexford\, Princeton University\nChanghoon Kim\, Barefoot Networks\nPietro Bressana\, Università della Svizzera italiana\n\nSoftware\nP4App\n\nTo install the Docker image:\n\nInstall Docker\n\nFollow the instructions on the Docker website: https://docs.docker.com/install/\nAlternatively\, you can use a package manager. For example\, on OSX\, you can install Docker with Homebrew$ brew cask install docker-toolbox\n\n\nClone the repository $ git clone --branch p4app --recurse-submodules https://github.com/p4lang/tutorials\nChange into an exercise directory\n$ cd tutorials/p4app-exercises/basic.p4app\nRun an example to start the image download\n$ make run\n\n\n\nVirtual Machine\nYou can either download a virtual machine image or build it from source. Note that both of these procedures can take around 45 minutes depending on the speed of your network connection. \n\nTo download the virtual machine image\n\nInstall VirtualBox\nhttps://virtualbox.org\nDownload virtual machine image\nP4 Tutorial 2018-06-01.ova\nImport virtual machine into VirtualBox\nOpen VirtualBox\, select “File > Import Appliance”\, and navigate to the downloaded file.\nBoot virtual machine\nSelect “P4 Tutorial 2018-06-01”\, and click “Start”.\n\n\nTo build the virtual machine from source\n\nInstall VirtualBox\nhttps://virtualbox.org\nInstall Vagrant\nhttps://vagrantup.com\nClone the tutorial repository\n$ git clone https://github.com/p4lang/tutorials\nNavigate to the vm directory\n$ cd tutorials/vm/\nBuild the virtual machine\n$ vagrant up\n\n\nFinal steps\nAfter the machine boots\, you should have a graphical desktop with all required software pre-installed\, logged in as username “p4” (with password “p4”).\n\nSpecial Thanks to our Sponsors:\n\n\n\n\n\n\n\n\n\n\nContact the organizers for sponsorship opportunities. \nThis is not a USENIX event\, but we would like to thank the support of USENIX.
URL:https://p4.org/event/p4-hackathon-at-nsdi/
CATEGORIES:Events
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DTSTART;TZID=UTC:20190219T080000
DTEND;TZID=UTC:20190219T080000
DTSTAMP:20260417T062526
CREATED:20250912T215909Z
LAST-MODIFIED:20250915T231404Z
UID:10000091-1550563200-1550563200@p4.org
SUMMARY:P4 Tutorial at NANOG 75
DESCRIPTION:A presentation by the P4 Education Working Group at NANOG 75.\nHeld at the Hyatt Regency San Francisco on Tuesday\, February 19\, 2019\, 4:00-6:00pm.\nInstructors\n\nAndy Fingerhut (Cisco Systems)\nAntonin Bas (Barefoot Networks)\n\nSoftware\nWe have created a Docker image that has all of the software needed to complete the tutorial exercises already installed. \n\nTo download the Docker image:\n\nInstall Dockerhttps://www.docker.comYou may also find the instructions at the following links useful:\n\nUbuntu 16.04\nUbuntu 18.04\nMac (dockerhub account required)\n\nWhen installing on Ubuntu\, make sure you do the optional step 2 (“Executing the Docker Command Without Sudo”).\nClone the p4app repository:git clone --branch p4app --recurse-submodules https://github.com/p4lang/tutorials\nChange directory to the first exercise:cd tutorials/p4app-exercises/basic.p4app\nTry running the first example. This will download the docker image and store it locally\, so you will have it ready for the event. You should see a mininet prompt (mininet>) at the end:make run
URL:https://p4.org/event/p4-tutorial-at-nanog-75/
CATEGORIES:Events
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BEGIN:VEVENT
DTSTART;TZID=UTC:20180924T083000
DTEND;TZID=UTC:20180924T174500
DTSTAMP:20260417T062526
CREATED:20250912T220013Z
LAST-MODIFIED:20250915T231422Z
UID:10000096-1537777800-1537811100@p4.org
SUMMARY:1st P4 Workshop in Europe (P4WE)
DESCRIPTION:A presentation by the P4 Language Consortium and ONF in conjunction with ICNP 2018\nHeld at Cambridge\, UK on September 24\, 2018\nP4WE 2018 is the first P4 Language Consortium event in European. It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world\, and to foster the growth of the P4 Community. \nP4WE\, which will run as a workshop at ICNP 2018\, will have proceedings. It aims to enable researchers to publish early stage work and small scale projects. \nVenue\nUniversity of Cambridge\nDepartment of Computer Science and Technology\nThe Computer Laboratory\nWilliam Gates Building\n15 JJ Thomson Avenue\, Cambridge CB3 0FD \nAgenda\n\n\n8:30 – 9:00am\n\nRegistration and Breakfast\n\n\n\n\n\n9:00 – 9:15\n\nWelcome and Introductions\n\n\n\n\n\n9:15 – 10:15\n\nKeynote: Extending the range of P4 programmability (slides)Speaker: Professor Gordon Brebner (Xilinx Labs)\n\n\n\n\n\n10:15 – 10:45\n\nCoffee break\n\n\n\n\n\n10:45 – 12:15\n\nNamed Data Networks using Programmable Switches. Rui Muigel (University of Lisbon)\, Salvatore Signorello (University of Luxembourg)\, Fernando M. V. Ramos (University of Lisbon) (slides)\nConsensus for Non-Volatile Main Memory. Huynh Tu Dang (Università della Svizzera italiana)\, Jaco Hofmann (TU Darmstadt)\, Yang Liu (Western Digital Research)\, Marjan Radi (Western Digital Research)\, Dejan Vucinic (Western Digital Research)\, Fernando Pedone (Università della Svizzera italiana)\, Robert Soulé (Università della Svizzera italiana) (slides)\nTransparent Edge Gateway for Mobile Networks. Ashkan Aghdai (NYU)\, Mark Huang (Huawei)\, David H. Dai (Huawei)\, Yang Xu (NYU)\, H. Jonathan Chao (NYU) (slides)\n\n\n\n\n\n12:15 – 13:30\n\nLunch break\n\n\n\n\n\n13:30 – 14:40\n\nPanel: P4 Education\n\n\n\n\n\n14:40 – 15:20\n\nLightning talks\n\n\n\n\n\n15:20 – 16:15\n\nCoffee break and Posters\n\n\n\n\n\n16:15 – 17:30\n\nStateless Load-Aware Load Balancing in P4. Benoit Pit–Claudel (Cisco Systems\, École Polytechnique)\, Yoann Desmouceaux Cisco Systems\, École Polytechnique)\, Pierre Pfister (Cisco Systems)\, Marc Townsley (Cisco Systems) (slides)\nP4LLVM: An LLVM based P4 Compiler. Dangeti Tharun Kumar\, S Venkata Keerthy\, Ramakrishna Upadrasta (IIT Hyderabad) (slides)\npcube: Primitives for network data plane programming. Rinku Shah\, Aniket Shirke\, Akash Trehan\, Mythili Vutukuru\, Purushottam Kulkarni (IIT Bombay) (slides)\n\n\n\n\n\n17:30 – 17:45\n\nClosing\n\n\n\n\nAccepted Posters\n\nNetwork Coding for Critical Infrastructure Networks. Rakesh Kumar\, Vignesh Babu\, David M. Nicol (University of Illinois\, Urbana-Champaign) (slides)\nARP-P4: A hybrid ARP-Path/P4Runtime switch. Isaias Martinez-Yelmo\, Joaquin Alvarez-Horcajo\, Miguel Briso-Montiano\, Diego Lopez-Pajares\, Elisa Rojas (University of Alcalá) (slides)\nOne for All\, All for One: A Heterogeneous Data Plane for Flexible P4 Processing. Jeferson Santiago da Silva\, Thibaut Stimpfling\, Thomas Luinaud\, Bachir Fradj (Polytechnique Montréal)\, Bochra Boughzala (Kaloom Inc.) (slides)\nUsing P4 and Source Based Routing To Enable Performant Intents in Software Defined Networks. Benjamin Lewis\, Lyndon Fawcett\, Dr. Matthew Broadbent\, Prof. Nicholas Race (Lancaster University)\nVerification of Generated RTL from P4 Source Code. Radek Iša\, Pavel Benáček (CESNET a.l.e.)\, Viktor Puš (Netcope Technologies) (slides)\nA P4-Based PON Architecture for 5G. Adebanjo Haastrup\, David Rincon\, Sallent Sebastia\, J. Ramon Piney (Universitat Politècnica de Catalunya) (slides)\nImplementation of Sketch-based Entropy Estimation for Network Traffic Analysis Using P4. Ku-Yeh Shih\, Yu-Kuen Lai\, Theophilus Wellem\, Ho-Ping Lee\, Po-Yu Huang\, Yu-Jau Lin (Chung Yuan Christian University) (slides)\nThe P4->NetFPGA Workflow\, and Experience Report from the Stanford CS344 Class. Stephen Ibanez\, Nick McKeown (Stanford University)\, Gordon Brebner (Xilinx Labs) (slides)\n\nAccepted Demos\n\nHardware-Accelerated Firewall for 5G Mobile Networks. Ruben Ricart-Sanchez (University of the West of Scotland)\, Pedro Malagon (Universidad Politecnica de Madrid)\, Jose M. Alcaraz-Calero (University of the West of Scotland)\, Qi Wang (University of the West of Scotland) (slides)\nSwitch ASIC Programmability in Hybrid Mode. Matty Kadosh\, Alan Lo\, Yonatan Piasetzky\, Omer Shabtai\, Marian Pritsak (Mellanox Technologies)\, Guohan Lu (Microsoft) (slides)\nRAYMAX P4-Enabled SmartNIC: Providing Service-Driven Data Center Networking. Yan Yan\, Shen Tan (Raymax Technology)\, Reza Nejabati\, Dimitra Simeonidou (University of Bristol) (slides)\nVNF offloading on a multi-vendor P4 fabric controlled by ONOS via P4Runtime. Andrea Campanella\, Carmelo Cascone (Open Networking Foundation) (slides)\nNetwork-assisted sorting. Petar Penkov\, Hristo Stoyanov (Stanford University)\n\nTechnical Program Committee\n\nNoa Zilberman (chair)\, University of Cambridge\nRobert Soulé (chair)\, Università della Svizzera italiana\nGianni Antichi\, University of Cambridge\nMario Baldi\, Cisco\nGordon Brebner\, Xilinx Labs\nPaolo Costa\, Microsoft Research\nAndy Fingerhut\, Cisco Systems\nNate Foster\, Cornell University\nTimothy Griffin\, University of Cambridge\nMukesh Hira\, VMWare\nMasoud Moshref\, Barefoot Networks\nFernando Ramos\, University of Lisbon\nChristian Esteve Rothenberg\, University of Campinas\n\nSpecial Thanks to our Sponsors:\n\n\n\n\nGold Level:\n\n\n\n\n\n\nSilver Level:\n\n\n\n\n\nBronze Level:\n\n\n\n\n\n\n 
URL:https://p4.org/event/1st-p4-workshop-in-europe-p4we/
CATEGORIES:Events
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