P4 - Language Consortium

Netdev 0x16
2022-10-24 08:00 UTC
Netdev 0x16, is a conference focused on Linux kernel networking and user space utilization of the interfaces to the Linux kernel networking subsystem are the focus.
As part of this event, a hands-on workshop presented by P4 community members will take place, “Learn How to Program the Linux Kernel Data Path with P4”. The session will offer an introduction to P4 programming with available open source software. The tutorial will feature a hands-on component where participants will learn how to program custom packet processing logic into the Linux kernel through several open source P4 technologies.

Speakers:
Fernando Ramos, Associate Professor, Instituto Superior Superior Técnico, University of Lisbon
Salvatore Signorello, Invited Assistant Professor at Faculdade de Ciências da Universidade de Lisboa

P4 Users Japan 2022
2022-10-20 08:00
The Japan P4 Users Group will be held as a hybrid event with both in-person and online access. This in-person event includes both presentations by industry and academic members of the P4 community who will share their use cases, insights and experiences with P4. The event will also feature exhibits.
In addition to live sessions, pre-recorded presentations will be released on the day of the event as well.
Check out the full agenda.

ACM SIGCOMM 2022
2022-08-26 08:00
Hackathon: P4 on Raspberry PI for Networking Education
August 26th | 1:30pm – 6:00pm

P4Pi is a low cost, open source hardware platform intended for teaching and research purposes. P4Pi enables designing and deploying P4-based network devices using the Raspberry Pi board. By setting a target price tag of less than an academic book (under $100), P4Pi aims to enable a large number of academic institutes to provide hands-on experience in networking education. Furthermore, as P4Pi is based on the popular Raspberry PI platform, it appeals to other communities such as hobbyists and does not depend on a single-source provider.
P4Pi is developed as part of the P4 Education Workgroup activities. The team aims to provide both educators and practitioners the knowledge and tools required to use P4Pi in class and at home, including tutorials, sample code, tools and community support.
This hackathon aims to bring together members of the networking community for the following goals: (i) introduce P4Pi to networking researchers and educators, enable them to get started with the platform and practice its use in lab-like environment. (ii) develop more teaching and supporting materials for the P4Pi ecosystem. (iii) enable researchers from all levels of expertise to develop P4Pi-based concepts and early-stage projects, and to stimulate collaborations between new users.
Check out all the details here!

P4 2022 Workshop
2022-05-24 08:00 - 2022-05-26 08:00
The P4 2022 Workshop incorporates insights and perspectives from P4 community members around the world and encompass topics related to:

P4 language
P4 compile targets
P4 tool chain
P4 use cases & apps
Control plane or network OS for P4 targets

Check out all the talks from this exciting and informative event on-demand below! Or, view full YouTube playlist.

Keynotes

TITLE
VIDEO
SLIDES

Welcome to P4 Workshop 2022!
JK Lee, Program Chair, member of P4 TST, Senior Principal Engineering, Intel

P4 on the Move!
Andy Fingerhut, Principal Engineer, Intel

Programmable Network Devices: One Vendor’s Perspective
Kenneth Duda, Founder, CTO & SVP Software Engineering, Arista Networks

Panel – IPU/DPU
Brad Burres, Fellow, Intel
Matty Kadosh, Principle Architect, Nvidia
Krishna Doddapaneni, Co-founder, VP Software Engineering, Pensando
Gordon Brebner, Senior Fellow, AMD

Scaling SDN Policy Distribution
Ben Pfaff, Principal Researcher, VMware

Expanding the P4 Universe
Gordon Brebner, Senior Fellow, AMD

Programmable Networking for a Distributed Edge
Nick McKeown, SVP & GM and Senior Fellow, Network & Edge Group, Intel
Sachin Katti, CTO, Network & Edge Group, Intel

The Journey Towards Predictable Network in Alibaba Cloud
Dennis Cai, Head of Network Infrastructure, Alibaba

SONiC, Programmability & Acceleration
Xin Liu, Principal Product Manager, Microsoft

Language

TITLE
VIDEO
SLIDES

Extend P4 to Support Runtime Programmability – In Depth Talk
Yong Feng, Ph.D Student, Tsinghua University
Dr. Haoyu Song, Researcher, Futurwei Technologies

Applets, a Portability and Composability Solution for P4 – In Depth Talk
Venkat Pullela, Chief of Technology, Networking, Keysight
Surendra Anubolu, Distinguished Engineer, Broadcom

Primitives for Finite Field Arithmetic in Network Switches – In Depth Talk
Daniel Seara, MSc Student, IST, Universit of Lisbon
Bernardo Conde, Master Student, IST, Universit of Lisbon

NERPA: Network Programming with Relational and Procedural Abstractions – In Depth Talk
Debnil Sur, Senior Software Engineer, VMware

SuperP4: Preprocessor-Aware Syntax and Semantic Analysis for P4 Programs – Tech Brief
Kaarthik Alagappan, Graduate Research Assistant, University of Central Florida

P4RROT: Generating P4 Code for the Application Layer – Tech Brief
Csaba Györgyi, PhD Student, ELTE Eötvös Loránd University
Sandor Laki, Assitant Professor, ELTE Eötvös Loránd University

Target

TITLE
VIDEO
SLIDES

Connection Tracking Using P4 – In Depth Talk
Anjali Singhai Jain, Principle Engineer, Intel
Nishanth Bhat, Intel
Namrata Limaye, Intel

Speeding Up Network FPGA Design Using P4 – In Depth Talk
Bert Klaps, Senior Systems Engineer, Intel
Miroslaw Walukiewicz, Intel

Line Rate IPsec on a PNA-Compliant Packet Processing Pipeline – In Depth Talk
Sameer Kittur, Distinguished Engineer, Pensando Systems

P4 Over Linux TC – In Depth Tal
Jamal Hadi Salim, CEO, Mojatatu Networks

Develop Your CPU Network Stack in P4 – In Depth Talk
Cristian Dumitrescu, Software Architect for Packet Processing, Intel

P4 at the Interface Between NIC and Host – In Depth Talk
Raghava Sivaramu, Fellow, Pensando Systems

P4 in Open vSwitch with OfP4 – Tech Brief
Ben Pfaff, Researcher, VMware

Deep Dive & Getting Started with PSA Implementation for eBPF – Tutorial
Tomasz Osiński, Cloud Software Development Engineer, Intel
Mateusz Kossakowski, R&D Expert, Orange Labs Poland
Jan Palimaka, Chief R&D Specialist, Orange Labs Poland

PSA-eBPF: Portable Switch Architecture for eBPF – Tech Brief
Tomasz Osiński, Cloud Software Development Engineer, Intel
Mateusz Kossakowski, R&D Expert, Orange Labs Poland
Jan Palimaka, Chief R&D Specialist, Orange Labs Poland

Tool Chain

TITLE
VIDEO
SLIDES

p4testgen: Automated Test Generation for Real-World P4 Data Planes – In Depth Talk
Fabian Ruffy, Intern, Intel and PhD Student, NYU

Dynamic P4 Pipeline Configuration – In Depth Talk
Anjali Singhai Jain, Principle Engineer, Intel
Hari Thantry, Cloud Architect, Google

Differential Testing of P4 Implementations Using CI/CD – Tech Brief
Parisa Ataei, Postdoc Scholar, Cornell University

P4 Designer – Demo
Pratap Pellakuru, Development Tools Software Architect, Intel
Sharmila S., Cloud Software Development Engineer, Intel

Introducing IPDK – Tutorial
Deb Chatterjee, Senior Director of Engineering, Intel

Control Plane and NOS

TITLE
VIDEO
SLIDES

Evolving P4 Runtime From Switch to DPU – In Depth Talk
Milind Chabbi, Nvidia
Alan Lo, Compiler/Cloud Architect, Nvidia

Accelerating 5G (Mobile Core) Control Plane Using P4 – In Depth Talk
Jingqi Huang, Ph.D Student, Purdue University
Jiayi Meng, PhD Candidate, Purdue University

Table Driven Interface (TDI): Usages and Advantages – In Depth Talk
Sayan Bandyopadhyay, Cloud Software Developer, Intel
James Choi, Cloud Software Architect, Intel

PINS Update and Roadmap – In Depth Talk
Bhagat Janarthanan, Software Engineering Lead, Google
Brian O’Connor, Intel
Vamsi Punati, Google
Reshma Sudarshan, Director of Applications Engineering, Intel

PINS Packet I/O – In Depth Talk
Srikishen Pondicherry, Software Engineer, Google
Brian O’Connor, Intel
Don Newton, Intel

P4-OVS Split Architecture – In Depth Talk
Namrata Limaye, Engineering Manager/Tech Lead, Intel
Brian O’Connor, Intel
Ajay Kumar Dubey, Intel

P4 as a Single Source of Truth for SONiC DASH Use Cases on Both Softswitch and Hardware – In Depth Talk
Reshma Sudarshan, Director of Applications Engineering, Intel
Chris Sommers, Sr. Software Architect, Keysight

PINS Getting Started – Tutorial
Judy Snow, ONF
Brian O’Connor, Intel

Application

TITLE
VIDEO
SLIDES

P4 FOR NIC – A CLOUD PROVIDER PERSPECTIVE – In Depth Talk
Hari Thantry, Cloud Architect, Google

Inband Network Telemetry (INT): History, Impact and Future Directions – In Depth Talk
JK Lee, Sr. Principal Engineer, Intel
Mukesh Hira, Principal Engineer, Networking and Security, VMware

Network Programmability “Squared” – In Depth Talk
Satoru Matsushima, Technical Meister, Softbank

Architecture for Multi-Terabit Programmable Networking Functions – In Depth Talk
Petr Kastovsky, Product Marketing, Intel
Georgios Nikolaidis, Software Architect, Intel

A Change Detection Primitive for the Network Data Plane – In Depth Talk
Gonçalo Matos, Researcher, INESC-ID

M-PolKA: Enabling and Exploiting Multipath Stateless Source Routing for Programmable Data Planes – In Depth Talk
Rafael S. Guimaraes, Associate Professor, Instituto do Espirito Santo

PMNet: In-Network Data Persistence – In Depth Talk
Korakit Seemakhupt, Graduate Student, University of Virginia

Service Mesh P4 Data Plane – In Depth Talk
Anjali Singhai Jain, Principle Engineer, Intel
Mrittika Ganguli, Intel
Valas Valancius, Google
Nupur Jain, Intel

Towards In-Network Anomaly Detection – In Depth Talk
João Romeiras Amado, PhD Student, INESC-ID, University of Lisbon

Demo of L2 Forwarding + Vxlan with Control Packet Flow Using P4-OVS – Demo
Nupur Uttarwar, Cloud Software Engineer, Intel
Sandeep Nagapattinam, Cloud Software Engineer, Intel

P7 (P4 Programmable Patch Panel): An Instant 100G Emulated Network Testbed in a Pizza Box – Demo
Fabricio Rodriguez, PhD Student, UNICAMP

Enabling WCMP in SONiC Using PINS and ONOS – Demo
Nillofar Toorchi, MTS, ONF
Daniele Moro, Cloud Software Development Engineer, Intel

TCP-INT: Lightweight INT in TCP Transport – Demo
Simon Wass, Cloud Software Engineer, Intel
Miao Mao, Staff Software Engineer, Baidu

Open SRv6 Project: Open Source for P4-based Edge Router – Demo
Weiqiang Cheng, Principle Architect of IP Network, China Mobile
Jiang Liu, Professor, Beijing University of Posts and Telecommunications

Path Tracing: Revealing the Unknowns about ECMP – Demo
Ahmed Abdelsalam, Software Engineer, Cisco Systems

SD-Fabric (Part 1) – Tutorial
Carmelo Cascone, Cloud Software Development Engineer, Intel
Charles Chan, Cloud Software Development Engineer, Intel

SD-Fabric (Part 2) – Tutorial
Carmelo Cascone, Cloud Software Development Engineer, Intel
Charles Chan, Cloud Software Development Engineer, Intel

SD-Fabric (Part 3) – Tutorial
Carmelo Cascone, Cloud Software Development Engineer, Intel
Charles Chan, Cloud Software Development Engineer, Intel

SmartNICs Summit
2022-04-26 08:00
Don’t miss the P4 Workshop taking place at the SmartNICs Summit on Tuesday, April 26th, 1-pm.
Mario Baldi, Pensando (Moderator)
Gordon Brebner, AMD
Carmelo Cascone, Intel

Session Description:

P4 is a programming language for specifying how network devices such as switches, routers, and NICs process packets. Vendors have used it as the programming language of choice for many products, such as the Cisco Silicon One chipsets, the Barefoot Tofino switches, the Pensando Distributed Services Cards, the AMD SN1000 SmartNIC, and the Aruba CX 10000 smart switch. It is particularly useful for today’s applications that employ software-defined networking (SDN). Using P4 makes network devices easier to program, debug, document, maintain, and update. The main ideas behind P4 are:
– Close relationship with typical packet processing tasks. P4 programs specify how packet headers are parsed and what actions are taken based on field values.
– Protocol independence: Network devices are not tied to specific protocols.
-Target independence: Programmers can describe packet processing for any underlying hardware.
– Reconfigurability in the field: Programmers can change the way switches process packets after deployment.
The P4 ecosystem includes an extensive range of products, projects, and services. The P4 website (p4.org) is a great source to learn about P4 and join the community. P4’s current tasks include the definition of a Portable NIC Architecture (PNA). Special Feature: Attendees will have opportunities to write P4 code and corresponding control plane functions.

2021 P4 Workshop Taiwan
2021-12-21 08:00
The P4 community which includes both industry and academia, came together to share research and practical experience related to P4 technology and use cases. Check the agenda and presentations included as part of this forum which was held at National Yang Ming Chiao Tung University.

Presentations

Title
Video
Slides

Opening Ceremony
Jason Yi-Bing Lin, Lifetime Chair Professor, NYCU, Taiwan

Intel® Intelligent Fabric Vision and P4 Technology
Todd Koelling, Director of Marketing and Technology Planning, Intel

Remote Priority Flow Control towards Source Flow Control (SFC)
Jeremias Blendin, Staff Engineer, Intel

P4 Users Community Update, Japan
Kentaro Ebisawa, Principal Researcher, Toyota Motor Corporation

Next Generation P4 Equipment
Jian-Hao Chen, Sr. Engineer, Accton Technology Corporation

Net-Gen Cloud-FMC Far Edge Architecture
James Yeh, Kaloom

P4 SONiC
Jimmy Ou, Senior Engineer, Accton Technology Corporation

Botnet Traffic Detection
Meng-Hsun Tsai, Associate Professor, NCKU, Taiwan

Design and Implementation of P4 Virtual Networks
Bonnie Chen, ITRI, Taiwan

P4-IPS: Deploying Intrusion Prevention System with Machine Learning on P4 Switch
Charles Hung-Pin Wen, Distinguished Professor, NYCU, Taiwan

Longer Stay Less Priority: Flow length approximation used in traffic scheduling in Data Centers
Chien Chen, Jointly Appointed Professor, NYCU, Taiwan

P4-Enabled network Slicing and 5G User Plane Function
Chien-Chao Tseng, Professor, NYCU, Taiwan

Server Load Balancer Accelerator (SLBA) P4-based Solution
Petr Kastovsky, Software Product Manager, Intel

A Flow Control Scheme based on Per Hop and Per Flow in Commodity Switches for Lossless Networks
Shie-Yuan Wang, Professor, NYCU, Taiwan

4th P4 Workshop in Europe (EuroP4) 2021
2021-12-13 10:15 - 17:45
DECEMBER 13, 2021 | VIRTUAL
The 4th European P4 Workshop (EuroP4) brought together networking researchers to discuss cutting-edge, P4-based, research. The workshop provided a venue for P4-based research and projects, a place to discuss P4-based tools, and the research community needs. The workshop aims to forge connections between researchers, introduce more networking researchers to the P4 community, and seed future top-tier publications and innovation.
EuroP4 was held in conjunction with ACM/IEEE ANCS’21.
General Chair
Fernando Ramos, University of Lisbon
Program Chairs
Mario Baldi, Pensando Systems
Ben Pfaff, VMware
Steering Committee
Robert Soulé, Yale University
Noa Zilberman, University of Oxford
Organizing Committee
Publicity Chair: Damu Ding, University of Oxford
Hotcrp Chair: Francisco Pereira, University of Lisbon
Technical Program Committee
Gianni Antichi, Queen Mary University of London
Mina Tahmasbi Arashloo, Cornell University
Giuseppe Bianchi, University of Rome Tor Vergata
Roberto Bifulco, NEC Laboratories Europe
Gordon Brebner, Xilinx
Mihai Budiu, VMware Research
Andrea Campanella, Open Networking Foundation
Mauro Campanella, GARR
Marco Chiesa, KTN Royal Institute of Technology
Nate Foster, Cornell University
Theo Jepsen, Stanford University
Sándor Laki, Eötvös Loránd University
Shir Landau-Feibish, Princeton University
Sebastiano Miano, Queen May University of London
Brian O’Connor, Open Networking Foundation
Gergely Pongrácz, Ericsson Research
Salvatore Pontarelli, Sapienza University
Gábor Rétvári, Budapest University of Technology and Economics
Christian Esteve Rothenberg, University of Campinas
Stefan Schmid, University of Vienna & TU Berlin
Agenda
10:15 – 10:30
Welcome and Introductions
Mario Baldi and Ben Pfaff
10:30 – 11:30
Keynote talk by Bruce Davie
Session Chair: Ben Pfaff
Title: Always in the Kitchen at Parties: Separating Guests from Infrastructure
Abstract: There is an emerging consensus that the services necessary to operate a cloud, including network virtualization, isolation of tenants, storage services, etc., are good candidates for offloading from the general-purpose servers that host guest workloads. These infrastructure (or “overhead”) services have historically run in the same servers that host guest workloads, but now the point of control is moving to IPUs (infrastructure processing units), DPUs (data processing units), and SmartNICs. The challenge is in developing offload processors that are both efficient for the required tasks and sufficiently flexible to allow continued innovation. This talk traces the long history of offloading services from the CPU to more specialised offload engines, and speculates on how this offloading trend will impact the architecture of future cloud data centres.
Bio: Bruce Davie is a computer scientist noted for his contributions to the field of networking. He recently co-founded (with Larry Peterson) Systems Approach, LLC, to produce open source books and educational materials. He is a former VP and CTO for the Asia Pacific region at VMware. He joined VMware during the acquisition of Software Defined Networking (SDN) startup Nicira. Prior to that, he was a Fellow at Cisco Systems, leading a team of architects responsible for Multiprotocol Label Switching (MPLS). Davie has over 30 years of networking industry experience and has co-authored 17 RFCs. He was recognized as an ACM Fellow in 2009 and chaired ACM SIGCOMM from 2009 to 2013. He was also a visiting lecturer at the Massachusetts Institute of Technology for five years. Davie is the author of multiple books and the holder of more than 40 U.S. Patents.
11:30 – 12:00
Virtual coffee break
12:00 – 13:30
Session 1: P4 Technology
Session Chair: Gianni Antichi
High-Performance Match-Action Table Updates from within Programmable Software Data
Planes
Balachandher Sambasivam, Maheswari Subramanian, Deb Chatterjee, Mallikarjuna Gouda,
Sosutha Sethuramapandian, Yogender Singh Saroha (Intel Corporation)
Writing P4 Compiler Backend for ASIC IPU
Balachandher Sambasivam, Maheswari Subramanian, Deb Chatterjee, Mallikarjuna Gouda,
Sosutha Sethuramapandian, Yogender Singh Saroha (Intel Corporation)
Generic change detection (almost entirely) in the dataplane
Gonçalo Matos (INESC-ID, Instituto Superior Técnico, Universidade de Lisboa); Salvatore Signorello
(LASIGE, Faculdade de Ciências, Universidade de Lisboa); Fernando M. V. Ramos (INESC-ID, Instituto
Superior Técnico, Universidade de Lisboa)
13:30 – 14:30
Lunch break
14:30 – 15:30
Session 2: Posters and Demos
Session Chair: Sebastiano Miano
Heavy Hitter Detection on Multi-Pipeline Switches
Fábio Luciano Verdi (UFSCar/KTH Royal Institute of Technology); Marco Chiesa (KTH Royal Institute of
Technology)
Realizing Zenoh with programmable dataplanes
Alexandre Santos, Jose Quevedo, Daniel Corujo (Universidade de Aveiro and Instituto de
Telecomunicações)
Towards a Framework for One-sided RDMA Multicast
Xin Zhe Khooi, Cha Hwan Song, Mun Choon Chan (National University of Singapore)
Kubernetes Load-Balancing and Policy Using P4
Nupur Jain, Anjali Singhai, Vinoth Kumar Chandra Mohan, Debashis Chatterjee, Dan Daly (Intel)
Towards a more programmable and performance-optimized Virtual Switch
Namrata Limaye (Cloud Software Architect, Intel); Debashis Chatterjee (Senior Director, Intel)
Achieving End-to-End Network Visibility with Host-INT
Tomasz Osiński (Open Networking Foundation & Warsaw University of Technology); Carmelo Cascone
(Open Networking Foundation)
15:30 – 16:00
Coffee break
16:00 – 17:30
Session 3: P4 Applications
Session Chair: Theo Jepsen
Mitigation of IPv6 Router Spoofing Attacks with P4
Moritz Mönnich, Nurefşan Sertbaş Bülbül, Doğanalp Ergenç, Mathias Fischer (Universität Hamburg)
Building an Internet Router with P4Pi
Radostin Stoyanov (University of Oxford); Adam Wolnikowski (Humatics); Robert Soulé (Yale
University); Sándor Laki (Eötvös Loránd University); Noa Zilberman (University of Oxford)
Networked Answer to “Life, The Universe, and Everything”
Giles Babich, Keith Bengston, Andrew Bolin, John Bunton, Yuqing Chen, Grant Hampson,
David Humphrey, Guillaume Jourjon (CSIRO)
17:30 – 17:45
Closing words

3rd P4 Workshop in Europe (EuroP4)
2021-12-01 08:00
A presentation by the P4 Language Consortium and ONF in conjunction with CoNEXT 2020
Held online on December 1, 2020
EuroP4 2020 is the third P4 Language Consortium event in Europe. It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world, and to foster the growth of the P4 Community.
Topics of an interest include, but are not limited to:

All aspects of P4-based network protocol research, including design, specification, verification, implementation, measurement, testing, and analysis.
Design, analysis, and evaluation of network architectures using P4 as a basis, e.g., specific algorithms and protocols for network virtualization or future Internet architectures.
New applications enabled by P4, including in-network computing and Big Data, Video and Virtual Reality, Mobile and Wireless Network Protocols and Applications, Ubiquitous computing, Internet-of-Things and Smart Cities.
Secure, reliable and dependable P4-based systems, including all aspects of monitoring, verification, debugging and troubleshooting networks enabled by P4.
P4-based and P4-NetFPGA based programmable data planes.
P4 end-host networking, offloading transport- and application-layer protocols to P4-enabled hardware.
Tools and frameworks for development using P4.
Contributions to the evolution of the P4 language.

Participation
As a consequence of the current situation of the COVID-19 pandemic and similar to CoNEXT’20, EuroP4’20 will be a fully virtual (online) event. Please follow the updates on the CoNEXT’20 and our website for the details.
Registration
Registration is through CoNEXT 2020
General Chairs
Noa Zilberman, University of Cambridge
Robert Soulé, Yale University
Program Chairs
Fernando Ramos, University of Lisbon
Gabor Retvari, Budapest University of Technology and Economics
Technical Program Committee (tentative)
Aurojit Panda, New York University
Ben Pfaff, VMware
Brian O’Connor, Open Networking Foundation
Christian Rothenberg, University of Campinas
Gianni Antichi, Queen Mary University of London
Gordon Brebner, Xilinx Labs
Jon Crowcroft, University of Cambridge
Marco Chiesa, KTH Royal Institute of Technology
Mario Baldi, Pensando Systems & Politecnico di Torino
Mina Tahmasbi Arashloo, Cornell University
Nate Foster, Cornell University
Paolo Costa, Microsoft Research
Roberto Bifulco, NEC Labs Europe
Sandor Laki, Eötvös Loránd University
Shir Landau Feibish, Princeton University
Theo Jepsen, Stanford University

OCP Global Summit 2021
2021-11-09 08:00 - 2021-11-10 08:00
ONF hosted a pavilion at the event featuring demos of several of our open source projects.

Aether: Software-Defined Private 5G
SD-Fabric: Full Stack P4 Programmable Network Fabric
SD-RAN: O-RAN Compliant nRT-RIC and xApps
PINS: Bringing P4 and SDN to SONiC
VOLTHA: Virtual OLT Hardware Abstraction for PON

Presentation: “P4 Integrated Network Stack (PINS)”
View Recording
Speakers:
Bhagat Janarthanan, Google
Reshma Sudarshan, Intel
Brian O’Connor, ONF
PINS is a P4Runtime based network switch stack built on top of the SONiC framework. The PINS stack combines the benefits of the SDN controller with SONiC and brings optionality to SDN networking. This presentation will cover the architecture, the high-level design, and the various supplementary features the team has implemented as part of the stack. We will also discuss in detail some of the use cases that are enabled by the PINS stack.
Demonstration by ONF
View Slides
Brian O’Conner, Daniele Moro, Don Newton, Niloofar Toorchi
The demonstration featured Weighted Cost MultiPath (WCMP) routing as a use case for PINS.

Japan P4 User Group 2021
2021-10-21 08:00
The Japan P4 Users Association is hosting this virtual event annual event in Japan. Japanese integrators, carriers, service providers, researchers, and individuals will join the event to exchange information. The language for this event is Japanese.
Check out the event web page to view videos and slides from this event.

Sponsors
APRESIA Systems
Intel K.K.
Macnica, Inc. Altima Company
Net One Systems Co., Ltd.
Toyota Motor Corporation

ACM SIGCOMM 2021
2021-08-23 10:00 - 2021-08-27 17:00
ONF projects are being highlighted in several of the ACM SIGCOMM 2021 sessions:
August 23, 2021 | 10:00am – 5:00pm EDT
Hackathon: P4 on Raspberry PI (P4Pi)
P4PI enables designing and deploying P4-based network devices using the Raspberry Pi platform and is based on the T4P4S compiler. P4PI is developed as part of the P4 Education Workgroup activities. The team aims to provide both educators and practitioners the knowledge and tools required to use P4PI in class and at home, including tutorials, sample code, tools and community support.
Check out the web page to learn more. Introductory videos can be accessed in a YouTube playlist.
August 23, 2021 | 1:40pm – 5:00pm EDT
Tutorial, “5G Connected Edge Cloud”

Describe 5G, breaking it down into components familiar to the SIGCOMM community.
Introduce the available open source software that implements these components.
Show how these building blocks can be assembled into a Kubernetes-based edge cloud.
Identify and discuss the systems research opportunities such a platform enables.

Check out the web page to learn more.
August 27, 2021 | 1:00pm – 5:00pm EDT
Tutorial: Network-Accelerated Distributed Deep Learning

An introduction on scaling distributed machine learning from a networking-centric perspective. Includes a walk through of through of different solutions for accelerating network communication beginning with in-network aggregation, describing SwitchML (a system for distributed machine learning that accelerates data-parallel training using P4 switches) as an example of co-design of programmable switch-based processing and end-host protocols.
Examination of into properties of the traffic and exploit the sparsity of gradient values. A description of OmniReduce, which evolves the concept of in-network aggregation and focuses on efficient collective operations for sparse data. We will close with lossy gradient compression techniques and the GRACE framework for implementing them.

Check out the web page to learn more.

2021 P4 Workshop
2021-05-18 08:00
The 2021 P4 Workshop was an exciting and informative virtual event that incorporated insights and perspectives from P4 community members around the world, with focused segments on:

P4 language
P4 targets
P4 use cases
P4 demos
P4 target tutorials

It included live keynotes as well as on-demand tech talks, demos, and tutorials – all the content is now available on-demand below.

LIVE KEYNOTES

Title & Speaker
Video
Slides

FROM PROGRAMMABLE SWITCHES TO PROGRAMMABLE NETWORKS
Nate Foster, Associate Professor Computer Science, Cornell University

P4 AT INTEL
Guido Appenzeller, CTO, Data Platforms Group, Intel

THE VALUE OF P4 PROGRAMMABILITY AT THE NETWORK EDGE
Prem Jain, CEO & Co-Founder, Pensando

APPROXIMATION IN PROGRAMMABLE DATA PLANE
Minlan Yu, Associate Professor, Harvard University

PINS P4 INTEGRATED NETWORK STACK
Mythil Raman, Director Switch Infrastructure, Google
Konstantin Weitz, Software Engineer, Google

SD-FABRIC PROGRAMMABLE FABRIC FOR DATACENTERS
Timon Sloane, VP Marketing & Ecosystem, ONF
Charles Chan, MTS, ONF

PROGRAMMABLE NETWORKING – OUR JOURNEY
Yiqun Cai, VP, Alibaba

PROGRAMMABILITY AND NETWORKING: WHY DO WE BOTHER?
Pere Monclus, VP & CTO Network and Security, VMware

HIGHER-ORDER TELEMETRY IN THE DATA PLANE
Jennifer Rexford, Gordon U.S. Wu Professor of Engineering, Department Chair, Princeton University

P4: TWO SIDES OF THE SAME COIN
Anja Feldmann, Director, Max-Planck

DEEPLY PROGRAMMABLE 5G EDGE CLOUD FABRIC WITH P4
Oğuz Sunay, VP R&D, Mobility, ONF
Carmelo Cascone, MTS, ONF

INVITED TALKS

Title & Speaker
Video
Slides

P4 PRACTICE AT BAIDU
Gang Cheng, Distinguished Engineer, Baidu

PROGRAMMABLE DATA PLANES FOR CONVERGED ACCESS INFRASTRUCTURE
Murali Venkat, Principal Engineer, Cisco

PROGRAMMABILITY IN NICS FOR CONGESTION CONTROL AND TRANSPORT
Nandita Dukkipati, Principal Engineer, Google
Konstantin Weitz, Software Engineer, Google

NDP WITH SONIC-PINS: A LOW LATENCY AND HIGH PERFORMANCE DATACENTER TRANSPORT INTEGRATED INTO SONIC
Rong Pan, Fellow, Data Platform Group, Intel
Reshma Sudarshan, Director Applications Engineering, Intel

TECHNICAL TALKS

Title & Speaker
Video
Slides

THE FOUR-DIMENSIONAL P4 SWITCHES – BASIC INTRODUCTION
Paul Chang, CTO, Asterfusion

EXTENDING P4 TO REALIZE A SCALABLE FLOW CACHING MECHANISM
Angelo Tulumello, Network Software Engineer, Axbryd / University of Rome Tor Vergata

MEASURING BROADBAND EXPERIENCE USING P4-PUSH TELEMETRY
Himal Kumar, CTO, Canopus Networks

P4-PROGRAMMABLE SMARTNIC CONTROLLED BY ONOS
Artur Jaworski, Software Developer, CodiLime
Pawel Parol, Senior Network Engineer, CodiLime

REVITALIZING INDUSTRIAL NETWORKING WITH PROGRAMMABLE DATA PLANES
Sándor Laki, Assistant Professor, ELTE Eötvös Loránd University

P4PI: P4 ON RASPBERRY PI FOR NETWORKING EDUCATION
Sándor Laki, Assistant Professor, ELTE Eötvös Loránd University

WHAT’S NEXT FOR P4? A JOURNEY AROUND MISSING FEATURES
Gergely Pongracz, Expert of Programmable Networks, Ericsson Research

ROUTER FOR ACADEMIA RESEARCH AND EDUCATION
Frédéric Loui, Technical Leader, GÉANT

CAN P4 RUN ON “SWITCHY” CPUS?
Cristian Dumitrescu, Software Architect, Intel
Han Wang, Software Architect, Intel

PORTABLE NIC ARCHITECTURE UPDATE
Andy Fingerhut, Principal Engineer, Intel

REALIZING ONE BIG SWITCH AS PERFORMANCE ABSTRACTION USING P4
Jeongkeun “JK” Lee, Principal Engineer, Intel
Petr Lapukhov, Network Engineer, Facebook

PACKET DEDUPLICATION IN P4
Stefan Johansson, FPGA Architect, Keysight Technologies

COMMON INTERMEDIATE REPRESENTATION (COMMON IR)
Venkat Pullela, Co-Founder, OpenNets

FLEXIBLE AND EFFICIENT MEMORY SYSTEM FOR A HIGH PERFORMANCE PROCESSING PIPELINE
Mario Baldi, Distinguished Technologist, Pensando

QUADCOPTER IMPLEMENTATION OF AN IN-NETWORK CENTRALIZED COLLISION AVOIDANCE ALGORITHM IN PROGRAMMABLE DATA PLANES
Fabricio Rodriguez, PhD Student, UNICAMP

PL2: TOWARDS PREDICTABLE LOW LATENCY IN RACK-SCALE NETWORKS
Yanfang Le, PhD Student, Intel & University of Wisconsin-Madison

DEMONSTRATIONS

Title & Speaker
Video
Slides

WHEN SRV6 MEETS 5G CORE: IMPLEMENTATION & DEPLOYMENT OF A NETWORK SERVICE CHAINING FUNCTION IN SMARTNICS
Guilherme Matos, Masters Student, Federal University of São Carlos

GOODBYE SCAPY, HELLO SNAPPI – DATAPLANE TESTING FROM DC TO DAYLIGHT USING OPEN TRAFFIC GENERATOR API
Chris Sommers, Software Architect, Keysight Technologies
Ankur Sheth, Director Engineering, Keysight Technologies

TUTORIALS

Title & Speaker
Video
Slides

P416 PROGRAMMING FOR INTEL TOFINO USING INTEL P4 STUDIO
Vladimir Gurevich, Principal Engineer, Barefoot, Intel
Andy Fingerhut, Principal Engineer, Intel

P4-OVS TUTORIAL
Dan Daly, Intel
Brian O’Connor, MTS, ONF
Tomasz Osinski, MTS, ONF
Kossakowski Mateusz, Orange
Nupur Jain, Intel
Gerald Rogers, Intel
Namrata Limaye, Software Engineer, Intel

NOVISPEAKER: COMMERCIALLY SUPPORTED P4 DEVELOPMENT & DEPLOYMENT TOOLSET FOR THE BAREFOOT/INTEL TOFINO
Arun Paneri, Director Engineering, NoviFlow
Jeff Elpern, Director Product Management, NoviFlow

SPONSORS

More About Our Sponsors

APS Networks® is about more than just network disaggregation within switches or software-defined networking (SDN). We are using a blend of development skills in hardware, firmware/embedded, OS, and application software, to help open the world of closed networking. We are taking the pieces and putting them back together more securely, efficiently, and most importantly, as part of an open, collaborative community with our customers and partners.
Our vision includes hardware, open source, and programmability, all tailored to our customers’ business-specific requirements, to provide a stable and supported platform for open networking innovation. Our dedicated hardware solutions are built around enabling the latest open technologies to serve vertical industry needs.

APS Networks ® BF2556X-1T
Advanced Programmable
Switch

APS Networks ® BF6064X-T
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NoviFlow believes programmable pipeline processing will fundamentally change the way networking is done. This has led to the development of our NoviWare SDN NOS, CyberMapper controller family, and cybersecurity network solutions deployed around the world.
We also believe that healthy solution ecosystems are built using great development tools that flatten the learning curve, reduce development effort and time, and deliver a reliable deployment.
NoviFlow’s NoviSpeaker P4 Runtime Speaker provides the P4 community with a commercially supported development and deployment toolset covering the complete development cycle and making full use of advanced P4 and Tofino capabilities on commercially available white-box hardware.

Vector Data builds Carrier-Grade NFV hardware infrastructure. Vector Data’s leading server, network, and storage solutions are deployed in SDN and Edge environments worldwide. All products are offered individually or as part of a complete OpenPod solution and are available with AC or -48V DC power as well as NEBS, ETSI, VCCI, KC, and other telecom compliance certifications.
Some products, such as Vault Edge servers, are offered with additional options such as outdoor, pole mount, fully rugged, HVDC, and wide temperature. Vector Data is a new ONF member and looks forward to joining the community.

3rd P4 Workshop in Europe (EuroP4) 2020
2020-09-12 08:00 - 17:00
EuroP4 2020 is the third P4 Language Consortium event in Europe. It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world, and to foster the growth of the P4 Community.

P4 Expert Roundtable Series
2020-04-28 08:00 - 2020-04-29 08:00
The P4 Expert Roundtable Series was a virtual event that included keynotes, plenary, and panel discussions relevant to the P4 community. The video recordings and slides are now available for on-demand access below, or view complete YouTube playlist.

Keynotes

P4 at the Edge
Nate Foster, Associate Professor, Computer Science, Cornell University
Slides

Using P4 & P4 Runtime for Optimal L3 Routing
Stefan Heule, Software Engineer, Google
Slides

Future of Programmable Packet Processing
Chang Kim, CTO Applications, Barefoot Division, Intel
Slides

P4 Evolution – From Packet Processing to Message Processing
Vipin Jain, Founder & CTO, Pensando
Slides

Plenary Sessions

Title
Slides
Video

How is P4 Evolving as a Language

Moderator: Andy Fingerhut, Cisco
Tomasz Osiński, Orange
Eric Campbell, Cornell University

Slides
Video

P4 Use Cases in Programmable Switching

Moderator: Prem Jonnalagadda, Intel
Guy Caspary, Cisco
Paola Grosso, University of Amsterdam
Arkadiy Shapiro, Intel

Slides
Video

P4 Use Cases in Operator Networks

Moderator: Brian O’Connor, ONF
Suresh Krishnan, Kaloom
Vijay Sivaraman, Canopus Networks

Slides
Video

P4 Use Cases in Programmable NICs

Moderator: Gordon Brebner, Xilinx
John Cruz, Pensando
Mario Baldi, Pensando

Slides
Video

Closing the Loop: Network Control in the Data Plane

Moderator: Jen Rexford, Princeton University
Daniel Alvarez, Intel

Slides
Video

Plenary Sessions

Title
Slides
Video

Programmable In-Network Security for Context-Aware BYOD Policies

Qiao Kang, Rice University
Srinivas Narayana Ganapathy, Rutgers University

Slides
Video

Efficient P4+FPGA-based Forwarding for SCION, a Path-Aware Internet Architecture

Kamila Součková, ETH Zurich
Steve Ibanez, Stanford University

Slides
Video

PBT-on-Demand on Mellanox P4-Capable Hybrid Switch

Itzik Ashkenazi, Technion – Israel Institute of Technology
Matty Kadosh, Mellanox Technologies
Muhammad Shahbaz, Stanford University

Slides
Video

Realizing Source Routed Multicast Using Mellanox’s Programmable Hardware Switches

Yonatan Piasetzky, Mellanox Technologies
Muhammad Shahbaz, Stanford University
Praveen Tammana, Princeton University

Slides
Video

NetWarden: Mitigating Network Covert Channels While Preserving Performance

Jiarong Xing, Rice University
Alan Liu, Carnegie Mellon & Boston University

Slides
Video

A Journey from OpenFlow to P4: Improved Performance and Reduced Development Time

Jeff Elpern, NoviFlow
Mihai Budiu, VMware Research

Slides
Video

FlowPulse: Traffic Classification Using P4 and ML

Himal Kumar, Canopus Networks
Vijay Sivaraman, Canopus Networks
Brian O’Connor, ONF
Prem Jonnalagadda, Intel

Slides
Video

Mathematical Operations in Programmable Switches Using TCAMs

Mojtaba Malekpourshahraki, University of Illinois at Chicago
Brent Stephens, University of Illinois at Chicago
Srinivas Narayana Ganapathy, Rutgers University

Slides
Video

Towards an Open P4 Programmable Hardware Platform

Gordon Brebner, Xilinx
Stephen Ibanez, Stanford University

Slides
Video

Programmable Data Plane Architecture for the Network Edge

Mario Baldi, Pensando Systems
Mina Tahmasbi Arashloo, Cornell University

Slides
Video

Building and Delivering a P4-based Network Tester

Ram Murthy, Keysight Technologies
Praveen Tammana, Princeton University

Slides
Video

Offloading Media Traffic to Programmable Data Plane Switches

Elie Kfoury, University of South Carolina
Mina Tahmasbi Arashloo, Cornell University

Slides
Video

Advanced Congestion Control with Programmable Switches

Jeongkeun “JK” Lee, Barefoot Division at Intel
Muhammad Shahbaz, Stanford University

Slides
Video

Sponsors

P4 Hackathon in Amsterdam
2019-10-18 09:00 - 18:00
An event organized by the P4 Education Working Group
Held in Amsterdam, The Netherlands on October 18th, 2019
The P4 Hackathon aims to develop novel, proof-of-concept data plane applications, and to support the open-source community through the development of tools and infrastructure.
The hackathon is intended for P4 users of all levels – from beginners to experts. We are keen to meet new people, see new faces, and create new collaborations between (and within) academia and industry!
Venue
KPN Teleportboulevard 121 1043 EJ Amsterdam Netherlands
Agenda

9:00 – 9:15

Registration
Coffee & Light Snacks

9:15 – 9:30

Welcome and Introductions

9:30 – 13:00

P4 introductory course for beginners
Break into interest groups and hack!

13:00 – 14:00

Lunch!

14:00 – 14:15

Progress discussion & QA session

14:15 – 17:45

Further P4/P4Runtime tutorials
More hacking

17:55 – 18:00

Closing

Diversity and inclusivity
The P4 hackathon aims to increase the diversity and inclusivity of the P4 community. Everyone should feel welcome taking part in the event, and we will enforce a strict no-harrasement code of conduct.
Please contact aaron@aagico.berlin if you are unable to attend because of travel or accomodation costs
Organization

Aaron A. Glenn, AAGlenn Internetworking Company
Noa Zilberman (chair), University of Cambridge (P4 Education Working Group)
Robert Soulé (chair), Yale University (P4 Education Working Group)

Special Thanks to our Sponsors:

Thank you to KPN for providing the event location and sponsoring food & drink in full.

2nd P4 Workshop in Europe (EuroP4)
2019-09-23 08:30 - 18:00
A presentation by the P4 Language Consortium and ONF in conjunction with ANCS 2019
Held at Cambridge, UK on September 23, 2019
EuroP4 2019 is the second P4 Language Consortium event in Europe.
It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world, and to foster the growth of the P4 Community.
Topics of an interest include, but are not limited to:

All aspects of P4-based network protocol research including design, specification, verification, implementation, measurement, testing, and analysis.
Contributions to network architecture using P4, e.g., specific algorithms and protocols for network virtualization or future Internet architectures.
New applications and in-network computing enabled by P4
P4-based and P4-NetFPGA based programmable data planes
End-host networking with P4
Tools and frameworks for development using P4
Performance analysis and measurement of P4-based designs and systems
Contributions to the evolution of the P4 language

Venue
University of Cambridge
Department of Computer Science and Technology
The Computer Laboratory
William Gates Building
15 JJ Thomson Avenue, Cambridge CB3 0FD
Agenda

8:30 – 9:15am

Registration and Breakfast

9:15 – 9:30

Welcome and Introductions

9:30 – 10:30

Keynote: Undefined behaviours in P4 progams: find them, fix them or exploit them. (Slides) Speaker: Professor Costin Raiciu (University Politehnica of Bucharest)

Abstract

Biography

10:30 – 11:00

Coffee break

11:00 – 12:15

Offloading data plane functions to the multi-tenant Cloud Infrastructure using P4. (Paper) (Slides)
Tomasz Osinski (Orange Labs & Warsaw University of Technology), Mateusz Kossakowski (Orange Labs & Warsaw University of Technology), Halina Tarasiuk (Warsaw University of Technology), Roland Picard (Orange Labs)
P4DNS: In-Network DNS. (Paper) (Slides)
Jackson Woodruff (University of Cambridge), Murali Ramanujam (University of Cambridge), Noa Zilberman (University of Cambridge)
Cryptographic Hashing in P4 Data Planes. (Paper) (Slides)
Dominik Scholz (Technical University of Munich), Andreas Oeldemann (Technical University of Munich), Fabien Geyer (Technical University of Munich), Sebastian Gallenmüller (Technical University of Munich), Henning Stubbe (Technical University of Munich), Thomas Wild (Technical University of Munich), Andreas Herkersdorf (Technical University of Munich), Georg Carle (Technical University of Munich)

12:15 – 13:45

Lunch break

13:45 – 15:00

daPIPE – A Data Plane Incremental Programming Environment. (Paper) (Slides)
Mario Baldi (Politecnico di Torino)
Random Linear Network Coding on Programmable Switches. (Paper) (Slides)
Diogo Gonçalves (University of Lisbon), Salvatore Signorello (University of Lisbon), Fernando M.V. Ramos (University of Lisbon), Muriel Medard (MIT)
Towards Understanding the Performance of P4 Programmable Hardware. (Paper) (Slides)
Hasanin Harkous (Technical University of Munich/ Nokia Bell Labs), Michael Jarschel (Nokia Bell Labs), Mu He (Technical University of Munich), Rastin Pries (Nokia Bell Labs), Wolfgang Kellerer (Technical University of Munich)

15:00 – 15:15

Posters and Demos introduction and pitch

15:15 – 16:15

Coffee break with Posters and Demos

16:15 – 17:15 (No Proceedings Track)

Towards Neural Network Inference on Programmable Switches. Jonatan Langlet (Karlstad University), Andreas Kassler (Karlstad University), Deval Bhamare (Karlstad University)
In-Network Traffic Redundancy Elimination over Programmable Data Plane. Hongrok Choi (Korea University), Seokwon Jang (Korea University), Sangheon Pack (Korea University)
Estimation of logarithmic and exponential functions entirely in P4-programmable data planes. Damu Ding (FBK CREATE-NET research center), Marco Savi (FBK CREATE-NET research center), Domenico Siracusa (FBK CREATE-NET research center)
Resource-Efficient Service Function Chaining in Programmable Data Plane. Hochan Lee (Korea University), Jaewook Lee (Korea University), Haneul Ko (Korea University), Sangheon Pack (Korea University)
How NRENs can benefit from P4. Mauro Campanella (GARR), Pavel Benacek (CESNET), Ivana Golub (PSNC), Xavier Jeannin (RENATER), Damian Parniewicz (PSNC), Marco Savi (FBK), Frederic Loui (RENATER)

17:15 – 17:30

Closing

18:00 onwards

Social Event This event will be held in conjuction with the IEEE ANCS reception.

Accepted Posters

P4MT: Multi-Tenant Support Prototype for International P4 Testbed. Jim Hao Chen (iCAIR/Northwestern University), Buck Chung (National Chiao Tung University), Chien-Chao Tseng (National Chiao Tung University), Joe Mambretti (iCAIR/Northwestern University)
Sketch-based Entropy Estimation for Network Traffic Analysis using Programmable Data Plane ASICs. Yu-Kuen Lai (Chung-Yuan Christian University), Ku-Yeh Shih (Chung-Yuan Christian University), Po-Yu Huang (Chung-Yuan Christian University), Ho-Ping Lee (Chung-Yuan Christian University), Yu-Jau Lin (Chung-Yuan Christian University), Te-Lung Liu (Narlabs), Jim Chen (Northwestern University)
Graph-to-P4: A P4 boilerplate code generator for parse graphs. Eder Ollora Zaballa (Technical University of Denmark), Zifan Zhou (Technical University of Denmark)
Asynchronous Extern Functions in Programmable Software Data Planes. Daniel Horpacsi (ELTE Eötvös Loránd University, Budapest, Hungary), Sandor Laki (ELTE Eötvös Loránd University, Budapest, Hungary), Peter Voros (ELTE Eötvös Loránd University, Budapest, Hungary), Mate Tejfel (ELTE Eötvös Loránd University, Budapest, Hungary), Gergely Pongracz (Ericsson Research), Laszlo Molnar (Ericsson Research)

Accepted Demos

P4-NetFPGA-based network slicing solution for 5G MEC architectures. Ruben Ricart-Sanchez (University of the West of Scotland), Pedro Malagon (Universidad Politecnica de Madrid), Jose M. Alcaraz-Calero (University of the West of Scotland), Qi Wang (University of the West of Scotland)
Using P4 on Fixed-Pipeline and Programmable Stratum Switches. Brian O’Connor (ONF), Yi Tseng (ONF), Maximilian Pudelko (ONF), Alireza Ghaffarkhah (Google), Devjit Gopalpur (Google)
How to measure the speed of light with programmable data plane hardware?. Ralf Kundel (TU Darmstadt), Fridolin Siegmund (TU Darmstadt), Boris Koldehofe (TU Darmstadt)

General Chairs

Noa Zilberman, University of Cambridge
Robert Soulé, Yale University

Program Chairs

Gianni Antichi, Queen Mary University of London
Fernando Ramos, University of Lisbon

Web Chair

Salvatore Signorello, University of Lisbon

Technical Program Committee

Gordon Brebner, Xilinx
Paolo Costa, Microsoft Research
Jon Crowcroft, University of Cambridge
Ben Pfaff, VMware
Georgios Nikolaidis, Barefoot Networks
Marco Chiesa, KTH
Gabor Retvari, University of Budapest
Roberto Bifulco, NEC
Ran Ben Basat, Harvard University
Andreas Kassler, Karlstads University
Mario Baldi, Politecnico di Torino
Christian Rothenberg, University of Campinas
Muhammad Shahbaz, Stanford University
Aurojit Panda, New York University
Marcin Wojicik, University of Cambridge

Special Thanks to our Sponsors:

ACM SIGCOMM 2019 Full-Day Tutorial on Programming the Network Data Plane
2019-08-23 08:30 - 17:00
Held at Shangri-La Hotel Beijing on Friday, August 23, 2019
Expectations
Attendees will be expected to have basic familiarity with the P4 lanaguage. Novice participants without any prior P4 experience are encouraged to refer to the Getting Started wiki page.
Attendees will also be expected to bring their own laptops. We will provide a VM image containing all the necessary packages and tools. The P4 specification is publicly available at the P4 website under an Apache license. Key development tools (front-end compiler and software switch capable of running P4 programs) are available as open-source tools (http://github.com/p4lang).
Instructions
In order to ensure that you arrive prepared for the tutorial we ask that you please follow the instructions listed on our GitHub repository.
If you attend and complete the P4 tutorial and you would like to receive a certificate of completion from P4.org, please send an email to sibanez@stanford.edu indicating your request.
Agenda

8:30am – 9:30am

P4 Language Overview

9:30am – 10:00am

Collaborative Lab Exercises – Part I

10:00am – 10:30am

Tea/Coffee Break

10:30 – 12:00pm

Collaborative Lab Exercises – Part II

12:00pm – 1:30pm

Lunch

1:30pm – 3:00pm

Mini Research Workshop – Part I

Leveraging P4 to Automatically Validate Networking Switches. Stefan Heule, Konstantin Weitz, Waqar Mohsin, Lorenzo Vicisano, Amin Vahdat (Google).
Mimic P4 Model. Le Tian (Information Engineering University), Pengshuai Cui (PLA Strategic Support Force Information Engineering University), Yuxiang Hu (PLA Strategic Support Force Information Engineering University)
Taurus: An Intelligent Data Plane. Tushar Swamy, Alexander Rucker, Muhammad Shahbaz, and Kunle Olukotun (Stanford University)
100Gbps P4-enabled Smart NIC: Architecture and Challenges on Datapath implementation in FPGA. Yan Yan (Raymax Technology)

3:00pm – 3:30pm

Break

3:30pm – 5:00pm

Mini Research Workshop – Part II

Non-invasive Campus Deployment of P4-based Network Measurement. Xiaoqi Chen (Princeton University)
Performant and Flexible DDoS Defense with Programmable Switches. Zaoxing Liu (Carnegie Mellon University), Georgios Nikolaidis (Barefoot Networks), Jeongkeun Lee (Barefoot Networks), Changhoon Kim (Barefoot Networks), Xin Jin (Johns Hopkins University), Minlan Yu (Harvard University), Vyas Sekar (Carnegie Mellon University)
Magellan: A Compiler and Runtime for High-Level Programming of Highly Programmable Network Data Planes. Y. Richard Yang (Yale University)
Redesigning Sketch Data Structures for Programmable Data Plane Devices. Vladimir Braverman (Johns Hopkins University)

Organizers

Stephen Ibanez (Stanford University)
Changhoon Kim (Barefoot Networks)

P4 Hackathon at IETF105
2019-07-20 08:00 - 2019-07-21 08:00
P4 Hackathon at IETF 105 in Montreal on July 20-21, 2019.
The Computing in the Network (COIN) IRTF research group will host a P4 Hackathon at IETF 105 in Montreal on July 20 and 21. The goal of the hackathon is to give the COIN community a way to investigate new applications in P4 and develop prototypes of potential new applications. As of now, a lot of P4 development has focused on data centers, but we would like the hackathon to address the DC-edge programming spectrum.
Topics of interest include industrial applications for fault detection, data filtering in streaming media, autonomous devices at the edge and distributed networking. Participants will be provided with all the tools necessary to create their application.
For more information about COIN, subscribe to their mailing list or visit their wiki.

P4 Workshop 2019
2019-05-01 08:00 - 18:30
A Presentation by the P4 Language Consortium
Held at Stanford University on Wednesday, May 1, 2019
Special Thanks to our Sponsors:

Venue
Address: Arrillaga Alumni Center, 326 Galvez St, Stanford, CA 94305
Directions below:

Agenda

8:00 – 9:00am

Registration and Breakfast

9:00 – 9:20am

Welcome and Introductions (Slides) (Video)Speakers: Nick McKeown (Stanford University), Nate Foster (Cornell University), Guru Parulkar (Open Networking Foundation)

SESSION CHAIR: Calin Cascaval (Barefoot Networks)

9:20 – 9:40am

Leveraging P4 for Fixed Function Switches (Abstract) (Slides) (Video)Speakers: Konstantin Weitz & Stefan Heule (Google)Co-authors: Konstantin Weitz, Stefan Heule, Waqar Mohsin, Lorenzo Vicisano, Amin Vahdat (Google)

9:40 – 10:00am

Building a Network Appliance using P4 and Tofino (Slides) (Video)Speaker and Author: Simon Capper (Arista)

10:00 – 10:20am

Pegasus: Load-Aware Selective Replication with an In-Network Coherence Directory (Abstract) (Slides) (Video)Speaker: Jialin Li (University of Washington)Co-authors: Authors: Jialin Li (University of Washington); Jacob Nelson (Microsoft Research); Xin Jin (Johns Hopkins University); Dan R. K. Ports (Microsoft Research)

10:20 – 10:35am

Demo Lightning Talks (1-2 min per demo, ~5 demos) (Video)

10:35 – 11:05am

Break and Demo Visits

SESSION CHAIR: Mihai Budiu (VMware Research)

11:05 – 11:25am

Event-Driven Packet Processing (Abstract) (Slides) (Video)Speaker: Stephen Ibanez (Stanford University)Co-authors: Stephen Ibanez (Stanford University); Gordon Brebner (Xilinx Labs); Gianni Antichi (Queen Mary University of London); Nick McKeown (Stanford University)

11:25 – 11:45am

Enabling Memory-intensive Network Functions on Programmable Switches (Abstract) (Slides) (Video)Speaker: Daehyeok Kim (Carnegie Mellon University)Co-authors: Daehyeok Kim, Zaoxing Liu (Carnegie Mellon University); Yibo Zhu (Bytedance); Changhoon Kim, Jeongkeun Lee, Antonin Bas (Barefoot Networks); Vyas Sekar, Srini Seshan (Carnegie Mellon University)

11:45 – 12:05pm

SwitchML: Scaling Distributed Machine Learning with In-Network Aggregation (Slides) (Video)Speaker: Jacob Nelson (Microsoft Research)Co-authors: Amedeo Sapio, Marco Canini, Chen-Yu Ho (KAUST); Jacob Nelson (Microsoft Research); Panos Kalnis (KAUST); Changhoon Kim (Barefoot Networks); Arvind Krishnamurthy (University of Washington); Masoud Moshref (Barefoot Networks); Dan R. K. Ports (Microsoft Research); Peter Richtàrik (KAUST)

12:05 – 12:25pm

Taurus: An Intelligent Data Plane (Abstract) (Slides) (Video)Speaker: Tushar Swamy (Stanford University)Co-authors: Tushar Swamy, Alexander Rucker, Muhammad Shahbaz, Neeraja Yadwadkar, Yaqi Zhang, Kunle Olukotun (Stanford University)

12:25 – 12:40pm

Demo Lightning Talks (1-2 min per demo, ~5 demos) (Video)

12:40 – 2:05pm

Lunch and Demo Visits

SESSION CHAIR: Nick McKeown (Stanford University)

2:05 – 3:20pm

KEYNOTE: The End of Moore’s Law and Faster General Purpose Processors, and a New Road Forward (Slides) (Video)Speaker and Author: John Hennessy (Stanford University)Abstract: After 40 years of remarkable progress in general-purpose processors, a variety of factors are combining to lead to a much slower rate of performance growth in the future. These limitations arise from three different areas: IC technology, architectural inefficiencies, and changing applications and usage. The end of Dennard scaling and the slowdown in Moore’s Law will require much more efficient architectural approaches than we have relied on. Although progress on general-purpose processors may hit an asymptote, domain specific architectures may be the one attractive path for important classes of problems, at least until we invent a flexible and competitive replacement for silicon.

3:20 – 3:50pm

Break and Demo Visits

SESSION CHAIR: Gordon Brebner (Xilinx)

3:50 – 4:10pm

Using Programmable Chip and Open Source Software to disaggregate Network Packet Broker (NPB) and 5G UPF (Abstract) (Slides) (Video)Speaker: Chris Sueng-Y. Park (KulCloud)Co-authors: Junho Suh (SK Telecom); SuengYong Park (KulCloud)

4:10 – 4:40pm

Trustworthy Data Plane Programming (Video)Speaker and Author: Nate Foster (Cornell University)

4:40 – 5:00pm

The Switching System Vendor Viewpoint: Opportunities and Challenges (Abstract) (Slides) (Video)Speaker and Author: Mario Baldi (Cisco Systems)

5:00 – 5:15pm

Closing Remarks (Video)

5:15 – 6:30pm

Reception

Demos to Visit

SRv6 Mobile User Plane, POC and Open Source Implementation (Toyota Motor Corporation, SoftBank, APRESIA Systems, Ltd.) (abstract)
daPIPE:DAta Plane Incremental Programming Environment (Cisco Systems, Politecnico di Torino) (abstract)
Improving Gossip Protocols with P4 (Cornell University)
Sampling on Demand using P4 Programmable Switch in Hybrid Mode (Technion University, Mellanox Technologies)
Fast String Searching on PISA (Università della Svizzera italiana, Barefoot Networks) (abstract)
Optimizing Memory Resource Allocation of P4 Match Action Tables (CESNET, Netcope Technologies)
T4P4S & PIE: Towards an AQM Evaluation Testbed with P4 and DPDK (Eötvös Loránd University) (abstract)
gRPC, P4 Runtime and Zero-Touch-Provisioning Deployment in Programmable Forwarding Planes (Noviflow)
P4 Insight: P4 visualization (Barefoot Networks)
P4-16 IPv6 Implementation of Cisco ACI Data Plane (MNK Consulting) (abstract)
Implementing the P4 Portable Switch Architecture (PSA) (Cornell University)
Event-Driven Packet Processing using P4->NetFPGA (Stanford University, Xilinx Labs) (abstract)

Technical Program Committee

Nate Foster (Chair), Cornell University
Nick McKeown (Chair), Stanford University
Anirudh Sivaraman, New York University
Gordon Brebner, Xilinx
Hongqiang Liu, Alibaba
Mihai Budiu, VMware
Mina Tahmasbi Arashloo, Princeton University
Sandesh Kumar Sodhi, Juniper Networks

P4 Developer Day 2019
2019-04-30 08:00
A Presentation by the P4 Language Consortium
Held at Stanford University on Tuesday, April 30, 2019
Special Thanks to our Sponsors:

Venue
Address: Arrillaga Alumni Center, 326 Galvez St, Stanford, CA 94305
Directions:

Developer Day Tracks
New for this year, we are offering two tracks for the developer day: a beginner track and an advanced track. Both tracks will be delivered by experienced instructors and using a software platform that will be made available shortly before the Developer Day itself.

Beginner Track
This track is for developers who are new to P4 and want a tutorial-style introduction to the languages main features. It is organized around a series of programming exercises in which participants implement conventional and novel solutions to various problems in networking including:

Basic forwarding, tunneling, and source routing
Load balancing
Monitoring and telemetry
P4Runtime

Only basic programming knowledge is required, but familiarity with Python and using a Linux virtual machines will be helpful.

Virtual Machine
We have created a VM with everything needed to work on the tutorial exercises, including the P4 Compiler, Behavioral Model, starter code, and editors. We suggest downloading the VM and executing the instructions below ahead of the tutorial.
Use the following link to download the VM image (5.2 GB).

Import and Run the VM
The VM is in .ova format and has been created using VirtualBox. To run the VM you can use any modern virtualization system, although we recommend using VirtualBox. For instructions on how to get VirtualBox and import the VM, use the following links:
VirtualBox Download
Importing a VM
Login Credentials (To access the Ubuntu system in the VM, use the following credentials with sudo privileges):

User: p4
Password: p4

System Requirements
The current configuration of the VM is 2 GB of RAM and 2 CPUs. These are the recommended minimum system requirements to complete the exercises. When imported, the VM takes approximately 8 GB of disk space. For the best experience, we recommend running the VM on a host system that has at least twice as many resources.

Agenda

Advanced Track
This track is for developers with intermediate knowledge of the P4 language. It is organized around a sequence of hands-on exercises that show how to build a leaf-spine data center fabric based on Segment Routing over IPv6 (SRv6), using the ONOS SDN controller:

Basic forwarding
Bridging
SRv6
ONOS Control Plane
Testing in Mininet

Only basic knowledge of Java is required. The track will include a brief introduction to ONOS for beginners. Participants will be provided with a skeleton implementation of the applicationq to complete, filling in the relevant parts to generate run-time table entries and other entities to implement bridging and SRv6 capabilities.

Virtual Machine
We have created a VM with everything needed to work on the tutorial exercises, including ONOS, stratum_bmv2, Mininet, P4Runtime, PTF, and code editors. We suggest downloading the VM and executing the instructions below ahead of the tutorial.
Use the following link to download the VM (5.3 GB). Please also make note of the backup link.

1.) Import and Run the VM
The VM is in .ova format and has been created using VirtualBox v6.0.6. To run the VM you can use any modern virtualization system, although we recommend using VirtualBox. For instructions on how to get VirtualBox and import the VM, use the following links:
VirtualBox Download
Importing a VM
Login Credentials (To access the Ubuntu system in the VM, use the following credentials with sudo privileges):

User: sdn
Password: [REDACTED]

* System Requirements
The current configuration of the VM is 4 GB of RAM and 4 core CPU. These are the recommended minimum system requirements to complete the exercises. When imported, the VM takes approx. 8 GB of HDD space. For a flawless experience, we recommend running the VM on a host system that has at least the double of resources.

2.) Generate SSH Keys
ONOS uses SSH key-based authentication to access its command line interface (CLI). Before using ONOS, you need to generate public/private rsa key pair using the following command inside the VM:
Command: ssh-keygen -t rsa -f ~/.ssh/id_rsa -P ‘’ -q

Agenda

Instructors

Nate Foster (Cornell University)
Brian O’Connor (Open Networking Foundation)
Carmelo Cascone (Open Networking Foundation)
And others (TBA)

P4 Hackathon in Frankfurt
2019-03-29 09:00 - 18:00
An event organized by the P4 Education Working Group
Held in Frankfurt, Germany on March 29, 2019
The P4 Hackathon aims to develop novel, proof-of-concept data plane applications, and to support the open-source community through the development of tools and infrastructure.
The hackathon is intended for P4 users of all levels – from beginners to experts.
We are keen to meet new people, see new faces, and create new collaborations between (and within) academia and industry!
Venue
EASTSIDE Otto-Messmer-Strasse 1 60314 Frankfurt am Main Deutschland
The event facility is managed by Co-Work & Play GmbH
Registration
Please note that registration is closed. Please contact aaron@aagico.berlin with any questions or concerns.
Agenda

9:00 – 10:00am

Registration

9:30 – 10:00

Welcome and Introductions

10:00 – 13:00

P4 introductory course for beginners
Break into interest groups and hack!

13:00 – 14:00

Lunch!

14:00 – 14:15

Progress discussion & QA session

14:15 – 17:45

Further P4/P4Runtime tutorials
More hacking

17:55 – 18:00

Closing

Diversity and inclusivity
The P4 hackathon aims to increase the diversity and inclusivity of the P4 community. Everyone should feel welcome taking part in the event, and we will enforce a strict no-harrasement code of conduct.
Please contact aaron@aagico.berlin if you are unable to attend because of travel or accomodation costs
Organization

Noa Zilberman (chair), University of Cambridge (P4 Education Working Group)
Robert Soulé (chair), Università della Svizzera italiana (P4 Education Working Group)
Aaron A. Glenn, AAGlenn Internetworking Company

Special Thanks to our Sponsors:

Thank you to DE-CIX for sponsoring the event location in full.

P4 Hackathon at NSDI
2019-03-01 08:00 - 18:00
An event organized by the P4 Education Working Group and the Cornell-Princeton Network Programming Initiative, in conjunction with NSDI 2019
Held in Boston, MA, USA on March 1, 2019
The P4 Hackathon aims to develop novel, proof-of-concept data plane applications, and to support the open-source community through the development of tools and infrastructure.
The hackathon is intended for P4 users of all levels – from beginners to experts.
We are keen to meet new people, see new faces, and create new collaborations between (and within) academia and industry!
Venue
Sheraton Boston 39 Dalton St Boston, MA 02199 USA Public Garden Room
The event is co-located with NSDI 2019.
Registration
Click here to register.
Please note that there are a limited number of spaces.
Agenda
This agenda is tentative, please check closer to the date!

8:00 – 10:00am

Registration

8:30 – 10:00am

P4 crash course for beginners

10:00 – 10:15

Welcome and Introductions, finding common interests to work on

10:15 – 17:25

Breaking into groups, hack!

17:25 – 17:55

Project presentations

17:55 – 18:00

Closing

Diversity and inclusivity
The P4 hackathon aims to increase the diversity and inclusivity of the P4 community. Everyone should feel welcome taking part in the event, and we will enforce a strict no-harrasement code of conduct.
Participants who are attending NSDI 2019, can apply for NSDI’s student and diversity travel grants. P4 specific information is coming soon!
Organization

Noa Zilberman (chair), University of Cambridge
Robert Soulé (chair), Università della Svizzera italiana
Nate Foster, Cornell University
Jennifer Rexford, Princeton University
Changhoon Kim, Barefoot Networks
Pietro Bressana, Università della Svizzera italiana

Software
P4App

To install the Docker image:

Install Docker

Follow the instructions on the Docker website: https://docs.docker.com/install/
Alternatively, you can use a package manager. For example, on OSX, you can install Docker with Homebrew$ brew cask install docker-toolbox

Clone the repository $ git clone --branch p4app --recurse-submodules https://github.com/p4lang/tutorials
Change into an exercise directory
$ cd tutorials/p4app-exercises/basic.p4app
Run an example to start the image download
$ make run

Virtual Machine
You can either download a virtual machine image or build it from source. Note that both of these procedures can take around 45 minutes depending on the speed of your network connection.

To download the virtual machine image

Install VirtualBox
https://virtualbox.org
Download virtual machine image
P4 Tutorial 2018-06-01.ova
Import virtual machine into VirtualBox
Open VirtualBox, select “File > Import Appliance”, and navigate to the downloaded file.
Boot virtual machine
Select “P4 Tutorial 2018-06-01”, and click “Start”.

To build the virtual machine from source

Install VirtualBox
https://virtualbox.org
Install Vagrant
https://vagrantup.com
Clone the tutorial repository
$ git clone https://github.com/p4lang/tutorials
Navigate to the vm directory
$ cd tutorials/vm/
Build the virtual machine
$ vagrant up

Final steps
After the machine boots, you should have a graphical desktop with all required software pre-installed, logged in as username “p4” (with password “p4”).

Special Thanks to our Sponsors:

Contact the organizers for sponsorship opportunities.
This is not a USENIX event, but we would like to thank the support of USENIX.

P4 Tutorial at NANOG 75
2019-02-19 08:00
A presentation by the P4 Education Working Group at NANOG 75.
Held at the Hyatt Regency San Francisco on Tuesday, February 19, 2019, 4:00-6:00pm.
Instructors

Andy Fingerhut (Cisco Systems)
Antonin Bas (Barefoot Networks)

Software
We have created a Docker image that has all of the software needed to complete the tutorial exercises already installed.

To download the Docker image:

Install Dockerhttps://www.docker.comYou may also find the instructions at the following links useful:

Ubuntu 16.04
Ubuntu 18.04
Mac (dockerhub account required)

When installing on Ubuntu, make sure you do the optional step 2 (“Executing the Docker Command Without Sudo”).
Clone the p4app repository:git clone --branch p4app --recurse-submodules https://github.com/p4lang/tutorials
Change directory to the first exercise:cd tutorials/p4app-exercises/basic.p4app
Try running the first example. This will download the docker image and store it locally, so you will have it ready for the event. You should see a mininet prompt (mininet>) at the end:make run

1st P4 Workshop in Europe (P4WE)
2018-09-24 08:30 - 17:45
A presentation by the P4 Language Consortium and ONF in conjunction with ICNP 2018
Held at Cambridge, UK on September 24, 2018
P4WE 2018 is the first P4 Language Consortium event in European. It aims to bring together P4 and P4->NetFPGA researchers from Europe and from around the world, and to foster the growth of the P4 Community.
P4WE, which will run as a workshop at ICNP 2018, will have proceedings. It aims to enable researchers to publish early stage work and small scale projects.
Venue
University of Cambridge
Department of Computer Science and Technology
The Computer Laboratory
William Gates Building
15 JJ Thomson Avenue, Cambridge CB3 0FD
Agenda

8:30 – 9:00am

Registration and Breakfast

9:00 – 9:15

Welcome and Introductions

9:15 – 10:15

Keynote: Extending the range of P4 programmability (slides)Speaker: Professor Gordon Brebner (Xilinx Labs)

10:15 – 10:45

Coffee break

10:45 – 12:15

Named Data Networks using Programmable Switches. Rui Muigel (University of Lisbon), Salvatore Signorello (University of Luxembourg), Fernando M. V. Ramos (University of Lisbon) (slides)
Consensus for Non-Volatile Main Memory. Huynh Tu Dang (Università della Svizzera italiana), Jaco Hofmann (TU Darmstadt), Yang Liu (Western Digital Research), Marjan Radi (Western Digital Research), Dejan Vucinic (Western Digital Research), Fernando Pedone (Università della Svizzera italiana), Robert Soulé (Università della Svizzera italiana) (slides)
Transparent Edge Gateway for Mobile Networks. Ashkan Aghdai (NYU), Mark Huang (Huawei), David H. Dai (Huawei), Yang Xu (NYU), H. Jonathan Chao (NYU) (slides)

12:15 – 13:30

Lunch break

13:30 – 14:40

Panel: P4 Education

14:40 – 15:20

Lightning talks

15:20 – 16:15

Coffee break and Posters

16:15 – 17:30

Stateless Load-Aware Load Balancing in P4. Benoit Pit–Claudel (Cisco Systems, École Polytechnique), Yoann Desmouceaux Cisco Systems, École Polytechnique), Pierre Pfister (Cisco Systems), Marc Townsley (Cisco Systems) (slides)
P4LLVM: An LLVM based P4 Compiler. Dangeti Tharun Kumar, S Venkata Keerthy, Ramakrishna Upadrasta (IIT Hyderabad) (slides)
pcube: Primitives for network data plane programming. Rinku Shah, Aniket Shirke, Akash Trehan, Mythili Vutukuru, Purushottam Kulkarni (IIT Bombay) (slides)

17:30 – 17:45

Closing

Accepted Posters

Network Coding for Critical Infrastructure Networks. Rakesh Kumar, Vignesh Babu, David M. Nicol (University of Illinois, Urbana-Champaign) (slides)
ARP-P4: A hybrid ARP-Path/P4Runtime switch. Isaias Martinez-Yelmo, Joaquin Alvarez-Horcajo, Miguel Briso-Montiano, Diego Lopez-Pajares, Elisa Rojas (University of Alcalá) (slides)
One for All, All for One: A Heterogeneous Data Plane for Flexible P4 Processing. Jeferson Santiago da Silva, Thibaut Stimpfling, Thomas Luinaud, Bachir Fradj (Polytechnique Montréal), Bochra Boughzala (Kaloom Inc.) (slides)
Using P4 and Source Based Routing To Enable Performant Intents in Software Defined Networks. Benjamin Lewis, Lyndon Fawcett, Dr. Matthew Broadbent, Prof. Nicholas Race (Lancaster University)
Verification of Generated RTL from P4 Source Code. Radek Iša, Pavel Benáček (CESNET a.l.e.), Viktor Puš (Netcope Technologies) (slides)
A P4-Based PON Architecture for 5G. Adebanjo Haastrup, David Rincon, Sallent Sebastia, J. Ramon Piney (Universitat Politècnica de Catalunya) (slides)
Implementation of Sketch-based Entropy Estimation for Network Traffic Analysis Using P4. Ku-Yeh Shih, Yu-Kuen Lai, Theophilus Wellem, Ho-Ping Lee, Po-Yu Huang, Yu-Jau Lin (Chung Yuan Christian University) (slides)
The P4->NetFPGA Workflow, and Experience Report from the Stanford CS344 Class. Stephen Ibanez, Nick McKeown (Stanford University), Gordon Brebner (Xilinx Labs) (slides)

Accepted Demos

Hardware-Accelerated Firewall for 5G Mobile Networks. Ruben Ricart-Sanchez (University of the West of Scotland), Pedro Malagon (Universidad Politecnica de Madrid), Jose M. Alcaraz-Calero (University of the West of Scotland), Qi Wang (University of the West of Scotland) (slides)
Switch ASIC Programmability in Hybrid Mode. Matty Kadosh, Alan Lo, Yonatan Piasetzky, Omer Shabtai, Marian Pritsak (Mellanox Technologies), Guohan Lu (Microsoft) (slides)
RAYMAX P4-Enabled SmartNIC: Providing Service-Driven Data Center Networking. Yan Yan, Shen Tan (Raymax Technology), Reza Nejabati, Dimitra Simeonidou (University of Bristol) (slides)
VNF offloading on a multi-vendor P4 fabric controlled by ONOS via P4Runtime. Andrea Campanella, Carmelo Cascone (Open Networking Foundation) (slides)
Network-assisted sorting. Petar Penkov, Hristo Stoyanov (Stanford University)

Technical Program Committee

Noa Zilberman (chair), University of Cambridge
Robert Soulé (chair), Università della Svizzera italiana
Gianni Antichi, University of Cambridge
Mario Baldi, Cisco
Gordon Brebner, Xilinx Labs
Paolo Costa, Microsoft Research
Andy Fingerhut, Cisco Systems
Nate Foster, Cornell University
Timothy Griffin, University of Cambridge
Mukesh Hira, VMWare
Masoud Moshref, Barefoot Networks
Fernando Ramos, University of Lisbon
Christian Esteve Rothenberg, University of Campinas

Special Thanks to our Sponsors:

Gold Level:

Silver Level:

Bronze Level:

ACM SIGCOMM 2018 Full-Day Tutorial on Programming the Network Data Plane
2018-08-20 09:00 - 17:30
A presentation by the P4 Language Consortium
Held at InterContinental Budapest on Monday, August 20, 2018
Virtual Machine
We have created a virtual machine that has all of the software needed to complete the developer day exercises already installed. You can either download a virtual machine image or build it from source. Note that both of these procedures can take around 45 minutes depending on the speed of your network connection.

To download the virtual machine image

Install VirtualBox
https://virtualbox.org
Download virtual machine image
P4 Tutorial 2018-06-01.ova
Import virtual machine into VirtualBox
Open VirtualBox, select “File > Import Appliance”, and navigate to the downloaded file.
Boot virtual machine
Select “P4 Tutorial 2018-06-01”, and click “Start”.

To build the virtual machine from source

Install VirtualBox
https://virtualbox.org
Install Vagrant
https://vagrantup.com
Clone the tutorial repository
$ git clone https://github.com/p4lang/tutorials
Navigate to the vm directory
$ cd tutorials/vm/
Build the virtual machine
$ vagrant up

Final steps
After the machine boots, you should have a graphical desktop with all required software pre-installed, logged in as username “p4” (with password “p4”).

Agenda

9:00 – 10:30am

Introduction to P4 and Overview of New Language Features

10:30 – 11:00am

Break

11:00 – 12:40

P4 Development Tools and Control Plane Interface

12:40 – 2:00pm

Lunch

2:00 – 3:15pm

Collaborative Lab Exercises

3:15 – 3:45pm

Break

3:45-5:30

Mini Research Workshop, Conclusion

P4 Developer Day
2018-06-06 08:00 - 18:30
A presentation by the P4 Language Consortium
Held at Stanford University on Wednesday, June 6, 2018
Special Thanks to our Sponsors:

Virtual Machine
We have created a virtual machine that has all of the software needed to complete the developer day exercises already installed. You can either download a virtual machine image or build it from source. Note that both of these procedures can take around 45 minutes depending on the speed of your network connection.

To download the virtual machine image

Install VirtualBox
https://virtualbox.org
Download virtual machine image
P4 Tutorial 2018-06-01.ova
Import virtual machine into VirtualBox
Open VirtualBox, select “File > Import Appliance”, and navigate to the downloaded file.
Boot virtual machine
Select “P4 Tutorial 2018-06-01”, and click “Start”.

To build the virtual machine from source

Install VirtualBox
https://virtualbox.org
Install Vagrant
https://vagrantup.com
Clone the tutorial repository
$ git clone https://github.com/p4lang/tutorials
Navigate to the vm directory
$ cd tutorials/vm/
Build the virtual machine
$ vagrant up

Final steps
After the machine boots, you should have a graphical desktop with all required software pre-installed, logged in as username “p4” (with password “p4”).

Slack
We will use Slack to make it easy for participants to ask the TAs questions.

Register at bit.ly/join-p4-lang-slack
Join the #d2-2018-spring channel

Pigeonhole
We will use Pigeonhole to manage questions during the panel.

Register at pigenhole.at
Enter the event code P4D2

Slides
The slides presented by the instructors at the developer day can be accessed here.
P4 Cheat Sheet
The P4 cheat sheet that was distribtued to attendees at the developer day can be accessed here.
Agenda

8:00 – 8:30am

Registration and Breakfast

8:30 – 9:00am

Technical Set-up for Hands-on LabIn order to complete the Developer Day exercises, we will distribute a virtual machine with all required software installed.

9:00 – 9:10am

Welcome and IntroductionsSpeaker: Nate Foster (Cornell University)

9:10 – 10:30am

Introduction to Data Plane ProgrammingInstructor: Stephen Ibanez (Stanford University)
Language BasicsInstructor: Stephen Ibanez (Stanford University)Session 1 will provide a hand-on introduction to P4. Students will start by implementing a “Hello World”-style application to gain an understanding of P4 concepts. The lesson will progressively introduce core language features, such as header/metadata types, packet parsers, and controls. By the end of this session, students will be able to implement a basic IP router.

10:30 – 11:00am

Break

11:00 – 12:30

P4 RuntimeInstructor: Brian O’Connor (ONF) Session 2 will cover software tools that are essential to developing P4 applications. Students will learn how to invoke the the P4 compiler, run the debugger, and start a P4 software switch. This session will also introduce the control-plane interfaces via P4 Runtime, a protocol-independent API auto-generated from the definition of a packet processing pipeline written in P4.

12:30 – 1:30pm

Lunch

1:30 – 2:00pm

Keynote: “Revisiting In-Network Control” Arvind Krishnamurthy (Washington)Abstract: Emerging programmable switches allow for flexible and reconfigurable packet processing at line rate. These emerging technologies address a key limitation with traditional SDN solutions that allow for only custom-plane customization but not data-plane customization needed by traffic management protocols that perform “in-network” control and per-packet processing.Despite their promising new functionality, reconfigurable switches are not all-powerful; they have limited state, support limited types of operations, and limit per-packet computation in order to be able to operate at line rate. In this talk, I describe how we can address these limitations by using novel approximation techniques and implement previously unrealized protocols that require in-network control. Our work thus represents a modest step towards enabling a “software defined data plane” that provides greater performance and isolation for datacenter applications.

2:00-3:00

Monitoring and DebuggingInstructor: Mina Tahmasbi Arashloo (Princeton University)Session 3 will focus on a set of labs related to network monitoring and debugging. In this session, students will gain a deeper understanding of P4 language concepts, including custom headers and intrinsic metadata. In the first exercise, students will implement Explicit Congestion Notification (ECN) to set a congestion bit in a packet header when the queue depth exceeds a threshold. In the second exercise, MRI, students will implement a simplified version of In-Band Network Telemetry to track the path that packets travel through the network.

3:00 – 3:30pm

Break

3:30 – 4:30pm

Advanced Data StructuresInstructor: Nate Foster (Cornell University)Session 4 covers advanced data structures. In this session, students will implement two data-plane applications. In the first, source routing, end-hosts specify paths through the network by using a stack of labels in the packet header. The switch must “pop” each label and forward out the appropriate interface. In the second, students will implement a network calculator. Packets containing arithmetic expressions are sent to a switch. The switch will evaluate the expressions, and return the results back to the sender.

4:30-5:30

Panel DiscussionModerator: Ben Pfaff (VMware)Panelists:

Bochra Boughzala (Kaloom)
Uyen Chau (ON.Lab)
Chris Sommers (Keysight)

5:30-6:30

Reception

5th P4 Workshop
2018-06-05 08:00 - 18:30
A Presentation by the P4 Language Consortium
Held at Stanford University on Tuesday, June 5, 2018
Special Thanks to our Sponsors:

Agenda

8:00 – 9:00am

Registration and Breakfast

9:00 – 9:20am

Welcome and Introductions Speaker: Nate Foster (Cornell University) (slides)

9:20 – 9:50am

Updates from the P4.org Working Groups

Architecture Working Group Speaker: Andy Fingerhut (Cisco Systems) (slides)
API Working Working Group Speakers: Lorenzo Vicisano (Google) and Antonin Bas (Barefoot Networks) (slides)
Applications Working Group Speakers: JK Lee (Barefoot Networks) and Mukesh Hira (VMware) (slides)

9:50 – 10:10am

Exposing Data Plane Programmability on Turn-key Network Devices Speaker and Author: Mario Baldi (Cisco Systems) (slides)

10:10 – 10:25am

Demo Lightning Talks During this session, 1-minute, 1-slide lightning talks will be presented by: Google, Netcope Technologies, University of Campinas, Eötvös Loránd University, and Open Networking Foundation (lightning talk slides found below)

10:25 – 10:55am

Break and Demo Visits

SESSION CHAIR: Mina Tahmasbi Arashloo (Princeton University)

10:55 – 11:15am

Stratum: Enabling the Next Generation of SDN Interfaces Speaker and Author: Brian O’Connor (Open Networking Foundation) (slides)

11:15 – 11:35am

A Framework for Network Intelligence Speaker and Author: Ken Duell (AT&T) (slides)

11:35 – 11:55am

Automated Test Case Generation from P4 Programs Speaker: Chris Sommers (Keysight Technologies) (slides) Co-Authors: Prasenjit Adhikary, Rudrarup Naskar, Kinshuk Mandal, Chris Sommers (Keysight Technologies)

11:55 – 12:15pm

P4C-XDP: Programming Linux Kernel Forwarding Plane Using P4 Speaker: William Tu (VMware NSBU) (slides) Co-Authors: William Tu (VMware NSBU), Mihai Bidiu (VMware Research)

12:15 – 12:30pm

Demo Lightning Talks During this session, 1-minute, 1-slide lightning talks will be presented by: Cisco Systems, Mellanox Technologies, Stanford University, Juniper Networks, Barefoot Networks, and POSTECH (lightning talk slides found below)

12:30 – 2:00pm

Lunch and Demo Visits

SESSION CHAIR: Cole Schlesinger (Barefoot Networks)

2:00 – 2:40pm

Keynote: NetChain and NetCache Speaker: Xin Jin (Johns Hopkins University) (slides) Co-Authors: Xin Jin (Johns Hopkins University, Xiaozhou Li (Barefoot Networks), Haoyu Zhang (Princeton University), Nate Foster (Cornell University), Jeongkeun Lee (Barefoot Networks), Robert Soule (USI), Changhoon Kim (Barefoot Networks), Ion Stoica (UC Berkeley)

2:40 – 3:00pm

Camus: High-Throughput Publish-Subscribe in the Forwarding Plane Speaker: Theo Jepsen (Università della Svizzera Italiana) (slides) Co-Authors: Theo Jepsen (USI), Masoud Moshref (Barefoot Networks), Antonio Carzaniga (USI), Nate Foster (Cornell University), Xiaozhou Li (Barefoot Networks), Milad Sharif (Barefoot Networks), Robert Soule (USI)

3:00 – 3:20pm

Fast Reroute in P4: Keep Calm and Enjoy Programmability Speaker: Marco Chiesa (KTH Royal Institute of Technology) (slides) Co-Authors: Roshan Sedar (Universite catholique de Louvain), Michael Borokhovich (Independent Researcher), Gianni Antichi (University of Cambridge), Marco Chiesa (KTH Royal Institute of Technology), Stefan Schmid (University of Vienna)

3:20 – 3:55pm

Break and Demo Visits

SESSION CHAIR: Sujata Banerjee (VMware)

3:55 – 4:15pm

Enabling Event Triggered Monitoring of Traffic Clusters Speaker: Gianni Antichi (University of Cambridge) (slides) Co-Authors: Jan Kucera (CESNET), Diana Popescu (University of Cambridge), Gianni Antichi, Jan Korenek (Brno University of Technology), Andrew Moore (University of Cambridge)

4:15 – 4:35pm

What P4 can Learn from Linux Traffic Control Speaker and Author: Jamal Hadi Salim (Mojatatu Networks) (slides)

4:35 – 4:55pm

Rapid Prototyping of Avionic Applications Using P4 Speaker: Dominik Scholz (Technical University of Munich) (slides) Co-Authors: Dominik Scholz, Fabien Geyer, Sebastian Gallenmuller, Georg Carle (Technical University of Munich)

4:55 – 5:15pm

Using P4 for Converged and Programmable XHaul in Mobile RAN Speakers and Co-Authors: James Yu (Nokia) & Gordon Brebner (Xilinx) (slides)

5:15 – 5:30pm

Closing RemarksSpeaker: Gordon Brebner (Xilinx)

5:30 – 6:30pm

Reception

Demos to Visit

Stratum: Enabling the Next Generation of SDN Interfaces (Google, Open Networking Foundation) (abstract) (demo_slide)
Segment Routing at 100G Using FPGA Smart NIC and P4 (CESNET, Netcope Technologies) (abstract) (demo_slide)
Switch ASIC Programmability in Hybrid Mode (Microsoft, Mellanox) (abstract) (demo_slide)
BB-Gen: A Packet Crafter for Performance Evaluation of P4 Data Planes (University of Campinas, Ericsson Research) (abstract) (demo_slide)
Towards Programmable Scheduling: PIFO Implementation on NetFPGA (New York University, Stanford University, Xilinx Labs) (abstract) (demo_slide)
P4 meets 5G (ELTE Eötvös Loránd University, Ericsson Research) (abstract) (demo_slide)
VNF offloading on a multi-vendor P4 fabric controlled by ONOS via P4Runtime (Open Networking Foundation) (abstract) (demo_slide)
In-band Network Telemetry Management Architecture: ONOS INT Service and XDP (POSTECH) (abstract) (demo_slide)
In-Network Deduplication for Packet Broker Deployments (Cisco Systems) (abstract) (demo_slide)
Barefoot Deep Insight (Barefoot Networks) (abstract) (demo_slide)
p4pktgen: Automated Test Case Generation for P4 Programs (Cisco Systems, Stanford University, Virginia Tech) (abstract) (demo_slide)
AFI Sandboxes: An adaptation of P4 on Trio3D (Juniper Networks) (abstract) (demo_slide)
Flexible OVS acceleration with P4 and low profile FPGA card (CESNET, Netcope Technologies) (abstract) (demo_slide)
MACSAD: An Exemplar Realization of Multi-Architecture P4 Pipelines (University of Campinas, Ericsson Research) (abstract) (demo_slide)

Technical Program Committee

Andy Fingerhut (Chair), Cisco Systems
Mina Arashloo, Princeton University
Sujata Banerjee, VMware
Tom Rodeheffer, Google
Cole Schlesinger, Barefoot Networks
Anirudh Sivaraman, New York University
Noa Zilberman, University of Cambridge

East Coast P4 Developer Day, Spring 2018
2018-03-09 08:00 - 17:30
A presentation by the P4 Language Consortium
Held at Cornell Tech on Friday, March 9, 2018
Virtual Machine
We have created a virtual machine that has all of the software needed to complete the developer day exercises already installed. You can either download a virtual machine image or build it from source. Note that both of these procedures can take around 45 minutes depending on the speed of your network connection.

To download the virtual machine image

Install VirtualBox
https://virtualbox.org
Download virtual machine image
P4 Tutorial 2018-03-05.ova
Import virtual machine into VirtualBox
Open VirtualBox, select “File > Import Appliance”, and navigate to the downloaded file.
Boot virtual machine
Select “P4 Tutorial 2018-03-05”, and click “Start”.

To build the virtual machine from source

Install VirtualBox
https://virtualbox.org
Install Vagrant
https://vagrantup.com
Clone the tutorial repository
$ git clone https://github.com/p4lang/tutorials
Navigate to the vm directory
$ cd tutorials/P4D2_2018_East/vm/
Build the virtual machine
$ vagrant up

Final steps
After the machine boots, you should have a graphical desktop with all required software pre-installed, logged in as username “p4” (with password “p4”). You may want to install the VirtualBox Guest Additions to optimize the graphics and clipboard interaction with your host OS. See the VirtualBox manual for more details.

Agenda

8:00 – 8:30am

Registration and Breakfast

8:30 – 9:00am

Technical Set-up for Hands-on LabIn order to complete the Developer Day exercises, we will distribute a virtual machine with all required software installed.

9:00 – 9:10am

Welcome and Introductions Speaker: Nate Foster (Cornell University)

9:10 – 10:45am

Introduction to Data Plane Programming Instructor: Stephen Ibanez (Stanford University)
Language Basics Instructor: Stephen Ibanez (Stanford University)Session 1 will provide a hand-on introduction to P4. Students will start by implementing a “Hello World”-style application to gain an understanding of P4 concepts. The lesson will progressively introduce core language features, such as header/metadata types, packet parsers, and controls. By the end of this session, students will be able to implement a basic IP router.

10:45 – 11:15am

Break

11:15 – 11:50

Software Tools Instructor: Praveen Kumar (Cornell University)Session 2 will cover software tools that are essential to developing P4 applications. Students will learn how to invoke the the P4 compiler, run the debugger, and start a P4 software switch. This session will also introduce the control-plane interfaces via P4 Runtime, a protocol-independent API auto-generated from the definition of a packet processing pipeline written in P4.

12:10 – 1:30pm

Lunch

1:30 – 3:00pm

Monitoring and Debugging Instructor: Mina Tahmasbi Arashloo (Princeton University)Session 3 will focus on a set of labs related to network monitoring and debugging. In this session, students will gain a deeper understanding of P4 language concepts, including custom headers and intrinsic metadata. In the first exercise, students will implement Explicit Congestion Notification (ECN) to set a congestion bit in a packet header when the queue depth exceeds a threshold. In the second exercise, MRI, students will implement a simplified version of In-Band Network Telemetry to track the path that packets travel through the network.

3:00 – 3:30pm

Break

3:30 – 3:50

Keynote: Toward Self-Driving Networks Speaker: Jennifer Rexford (Princeton University)

3:50 – 5:00pm

Advanced Data Structures Instructor: Sean Choi (Stanford University)Session 4 covers advanced data structures. In this session, students will implement two data-plane applications. In the first, source routing, end-hosts specify paths through the network by using a stack of labels in the packet header. The switch must “pop” each label and forward out the appropriate interface. In the second, students will implement a network calculator. Packets containing arithmetic expressions are sent to a switch. The switch will evaluate the expressions, and return the results back to the sender.

5:00 – 5:45

Panel DiscussionModerator: Nate Foster (Cornell University)Panelists:

Mina Tahmasbi Arashloo (Princeton University)
Anthony Dalleggio (JP Morgan Chase & Co.)
Sandesh Kumar Sodhi (Juniper Networks)

5:45-5:55

Closing Remarks
Speaker: Nate Foster (Cornell University)

6:00-7:30

Reception
Riverwalk Bar & Grille (425 Main St., Roosevelt Island)

P4 Developer Day Fall 2017
2017-11-10 08:00 - 19:00
A joint presentation by Stanford University and P4 Language Consortium.

Held at Arrillaga Alumni Center, Stanford University on Friday, November 10, 2017.

We would like to thank our sponsors for their support:

Agenda

8:00 – 8:30am

Registration and Breakfast

8:30 – 9:00am

Technical Set-up for Hands-on Lab

In order to complete the exercises at the Fall 2017 P4 Developer Day, we have created a virtual machine that has all of the required software installed. Note that this download and setup can take around 45 minutes.
To build the virtual machine:

Step 1: Install VirtualBox https://virtualbox.org/
Step 2: Install Vagrant: https://vagrantup.com/
Step 3: Clone the tutorial repository:
$ git clone https://github.com/p4lang/tutorials

Step 4: Go to the vm directory:
$ cd tutorials/P4D2_2017_Fall/vm/

Step 5: Build the virtual machine:
$ vagrant up

Step 6: Login and restart: Log in with username p4 and password p4 and issue the command
sudo shutdown -r now
When the machine reboots, you should have a graphical desktop machine with the required software pre-installed.

9:00 – 9:10am

Welcome and Introductions

Robert Soulé, Università della Svizzera Italiana (USI)

Video for this session is available here.

9:10 – 10:45am

Introduction to Data Plane Programming
Language Basics

by Stephen Ibanez, Stanford University

Session 1 will provide a hand-on introduction to P4. Students will start by implementing a “Hello World”-style application to gain an understanding of P4 concepts. The lesson will progressively introduce core language features, such as header/metadata types, packet parsers, and controls. By the end of this session, students will be able to implement a basic IP router.

Slides for this session are available here.
Video for this session is available here.

10:45 – 11:15am

Break

11:15 – 12:00pm

Software Tools and P4 Runtime

by Carmelo Cascone and Brian O’Connor, Open Networking Foundation (ONF)

Session 2 will cover software tools that are essential to developing P4 applications. Students will learn how to invoke the the P4 compiler, run the debugger, and start a P4 software switch. This session will also introduce the control-plane interfaces via P4 Runtime, a protocol-independent API auto-generated from the definition of a packet processing pipeline written in P4.

Slides for this session are available here.
Video for this session is available here.

12:00 – 1:30pm

Lunch

1:30 – 3:00pm

Monitoring and Debugging

by Mina Tahmasbi (Princeton University)

Session 3 will focus on a set of labs related to network monitoring and debugging. In this session, students will gain a deeper understanding of P4 language concepts, including custom headers and intrinsic metadata. In the first exercise, students will implement Explicit Congestion Notification (ECN) to set a congestion bit in a packet header when the queue depth exceeds a threshold. In the second exercise, MRI, students will implement a simplified version of In-Band Network Telemetry to track the path that packets travel through the network.

Slides for this session are available here.
Video for this session is available here.

3:00 – 3:30pm

Break

3:30 – 4:50pm

Advanced Data Structures

by Samar Abdi (Google)

Session 4 covers advanced data structures. In this session, students will implement two data-plane applications. In the first, source routing, end-hosts specify paths through the network by using a stack of labels in the packet header. The switch must “pop” each label and forward out the appropriate interface. In the second, students will implement a network calculator. Packets containing arithmetic expressions are sent to a switch. The switch will evaluate the expressions, and return the results back to the sender.

Slides for this session are available here.
Video for this session is available here.

4:50 – 5:00pm

Break

5:00 – 5:10pm

Closing Remarks

by Robert Soulé, Università della Svizzera Italiana (USI)

Slides for this session is available here.

5:10 – 6:00pm

Panel Discussion

Dejan Vucinic, Western Digital
Mario Baldi, Cisco Systems
Anirudh Sivaraman, NYU
Anurag Agrawal, Barefoot Networks

Video for this session is available here.

6:00 – 7:00pm

Reception

4th P4 Workshop
2017-05-17 08:00 - 18:30
A joint presentation by Stanford University and P4 Language Consortium.

Held at Arrillaga Alumni Center, Stanford University on Wednesday, May 17, 2017.
Agenda

8:00 – 9:00

Registration and Breakfast

9:00 – 9:15

Welcome and Introductions

Professor Nick McKeown (Stanford) (slides) and Professor Nate Foster (Cornell) (slides)

9:15 – 9:45

Updates from the P4.org Working Groups

Language Design (slides)
Architecture (slides)
API (slides)

9:45 – 10:05

P4 Program-dependent Controller Interface for SDN Applications

Samar Abdi, Waqar Mohsin, Yavuz Yetim (Google) (slides)

10:05 – 10:20

Demo Lightning Talks

High-Fidelity Validation of P4 Networks with SONiC-P4 Software Switch and CrystalNet (slide)

Tool release: P4 to Wireshark packet dissector (slide)

SAI behavioral model soft switch (slide)

DAIET: Data Aggregation In nETwork (slide)

Language-Directed Hardware Design for Network Performance Monitoring (slide)

P4-NetFPGA Toolchain: Writing Stateful P4 Programs (slide)

10:20 – 10:55

Break and Demo Visits

10:55 – 11:15

Making the Switch: Coast to Coast Production P4 White Box Trial

Ken Duell (AT&T)

11:15 – 11:35

High-Fidelity Validation of P4 Networks with SONiC-P4 Software Switch and CrystalNet

Hongqiang Liu, Yibo Zhu (Microsoft Research); Jiaxin Cao, Jitendra Padhye, Guohan Lu, Lihua Yuan (Microsoft) (slides)

11:35 – 11:55

dRMT: Disaggregated Programmable Switching

Sharad Chole, Andrew Fingerhut, Sha Ma (Cisco Systems);Anirudh Sivaraman (Massachusetts Institute of Technology); Shay Vargaftik (Technion);Alon Berger, Gal Mendelson (Technion); Mohammad Alizadeh (Massachusetts Institute of Technology); Shang-Tse Chuang, Isaac Keslassy (Technion/VMware); Ariel Orda (Technion); Tom Edsall (Cisco Systems); (slides)

11:55 – 12:15

NetCache: Fast In-Network Caching for Key-Value Stores

Xin Jin (UC Berkeley and JHU); Xiaozhou Li (Barefoot Networks); Haoyu Zhang (Princeton University); Robert Soulé (Barefoot Networks and Università della Svizzera italiana); Jeongkeun Lee (Barefoot Networks); Nate Foster (Barefoot Networks and Cornell University); Changhoon Kim (Barefoot Networks); Ion Stoica (UC Berkeley) (slides)

12:15 – 12:30

Demo Lightning Talks

Piggybacking Network Functions on SDN with P4 support (slide)

100G In-Band Network Telemetry with P4 and FPGA (slide)

Proposal for a PPPoE Demo (slide)

T4P4S: A P4 compiler for a wide variety of targets (slide)

Uniform Timestamping in P4 (slide)

Track every congestion at any queue in your network (slide)

Performant Stateful Security Functions in P4 and C (slide)

12:30 – 2:00

Lunch and Demo Visits

2:00 – 2:20

The Software Architecture of the P4-16 Reference Compiler

Mihai Budiu (VMware Research); Chris Dodd (Barefoot Networks) (slides)

2:20 – 2:40

Language-Directed Hardware Design for Network Performance Monitoring

Srinivas Narayana, Anirudh Sivaraman, Vikram Nathan, Prateesh Goyal (MIT); Venkat Arun (IIT Guwahati); Mohammad Alizadeh (MIT); Vimalkumar Jeyakumar (Cisco Tetration analytics); Changhoon Kim (Barefoot networks) (slides)

2:40 – 3:00

Executable Formal Semantics of P4 and Applications

Ali Kheradmand, Grigore Rosu (University of Illinois at Urbana Champaign) (slides)

3:00 – 3:20

A Program Logic for Automated P4 Verification

Nate Foster (Barefoot Networks/Cornell University); Cole Schlesinger (Barefoot Networks); Robert Soulé (Barefoot Networks/Universita della Svizzera italiana); Han Wang (Barefoot Networks) (slides)

3:20 – 3:55

Break and Demo Visits

3:55 – 4:15

The Extensible Network – Evolution in Protocol and Data Plane Agility

Daniel Bernier (Bell Canada); Milad Sharif (Barefoot Networks) (slides)

4:15 – 4:35

Hybrid P4 Switch

Ashkan Aghdai, Yang Xu, H. Jonathan Chao (New York University) (slides)

4:35 – 4:55

Deploying P4 Applications in Server-Based Networks

Abhijeet Prabhbune, Bapi Vinnakota (Netronome); Huynh Tu Dang, Fernando Pedone, Robert Soulé (Università della Svizzera italiana) (slides)

4:55 – 5:15

Sonata: Scalable Streaming Analytics for Network Telemetry

Arpit Gupta (Princeton University); Ankita Pawar (Unaffiliated); Rob Harrison (Princeton University); Rüdiger Birkner (ETH Zürich); Marco Canini (KAUST); Nick Feamster, Jennifer Rexford (Princeton University); Walter Willinger (NIKSUN Inc.) (slides)

5:15 – 5:30

Closing Remarks

5:30 – 6:30

Reception

Demos:
The following demos will be running in Fischer Conference Center and can be visited during breaks.

Piggybacking Network Functions on SDN with P4 support

Chang Liu, Arun Raghuramu, Chen-Nee Chuah (University of California Davis); Balachander Krishnamurthy (AT&T Labs-Research) (slide)

Proposal for a PPPoE Demo

Shabbir Khan, Ashok Malani (XFLOW RESEARCH INC.) (slide)

Tool release: P4 to Wireshark packet dissector

Georgios Nikolaidis (Barefoot Networks) (slide)

SAI behavioral model soft switch

Yonatan Piasetzky (Mellanox); Guohan Lu (Microsoft) (slide)

Language-Directed Hardware Design for Network Performance Monitoring

Srinivas Narayana, Anirudh Sivaraman, Vikram Nathan, Prateesh Goyal (MIT); Venkat Arun (IIT Guwahati); Mohammad Alizadeh (MIT); Vimalkumar Jeyakumar (Cisco Tetration analytics); Changhoon Kim (Barefoot networks) (slide)

P4-NetFPGA Toolchain: Writing Stateful P4 Programs

Stephen Ibanez (Stanford University); Gordon Brebner (Xilinx Labs) (slide)

100G In-Band Network Telemetry with P4 and FPGA

Pavel Benáček, Viktor Puš (CESNET, a.l.e.); Michal Kekely, Lukáš Richter (Netcope Technologies a.s.); Pavel Minařík, Jan Pazdera (Flowmon Networks a.s.) (slide)

T4P4S: A P4 compiler for a wide variety of targets

Sandor Laki (Eötvös Loránd University) (slide)

Uniform Timestamping in P4

Hakim Weatherspoon, Dhruv Singhal, Jingbo Wang (Cornell University) (slide)

Track every congestion at any queue in your network

Jeongkeun Lee, Jithin Thomas (Barefoot Networks) (slide)

High-Fidelity Validation of P4 Networks with SONiC-P4 Software Switch and CrystalNet

Yibo Zhu, Hongqiang Liu (Microsoft Research); Jiaxin Cao, Jitendra Padhye, Guohan Lu, Lihua Yuan (Microsoft) (slide)

Performant Stateful Security Functions in P4 and C

Jaco Joubert, David George, Bapi Vinnakota (Netronome) (slide)

DAIET: Data Aggregation In nETwork

Amedeo Sapio, Ibrahim Abdelaziz, Marco Canini, Panos Kalnis (KAUST) (slide)

Sponsors:
AT&T Barefoot Networks Cisco Google Netronome Xilinx
